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| author | Richard Earnshaw <rearnsha@arm.com> | 2009-07-23 15:02:20 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2009-07-23 15:02:20 +0000 |
| commit | 6d53a79fde65d6d9bcfd445a250e9c3d2c92c703 (patch) | |
| tree | 1e36eb3a589301af7a0943d6ffdcd759889ae313 /gcc/config/arm | |
| parent | fa89660f9ac3de88b0dbd12403b720d8179eeca1 (diff) | |
| download | gcc-6d53a79fde65d6d9bcfd445a250e9c3d2c92c703.zip gcc-6d53a79fde65d6d9bcfd445a250e9c3d2c92c703.tar.gz gcc-6d53a79fde65d6d9bcfd445a250e9c3d2c92c703.tar.bz2 | |
(split for ior/xor with shift and zero-extend): Cast op3 to
unsigned HWI.
From-SVN: r150013
Diffstat (limited to 'gcc/config/arm')
| -rw-r--r-- | gcc/config/arm/arm.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 7aaa4c6..863a670 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4219,7 +4219,7 @@ (match_operator 5 "subreg_lowpart_operator" [(match_operand:SI 4 "s_register_operand" "")]))))] "TARGET_32BIT - && (INTVAL (operands[3]) + && ((unsigned HOST_WIDE_INT) INTVAL (operands[3]) == (GET_MODE_MASK (GET_MODE (operands[5])) & (GET_MODE_MASK (GET_MODE (operands[5])) << (INTVAL (operands[2])))))" |