Adapt atomic compare and swap to ARMv8-M Baseline

2016-10-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/sync.md (atomic_compare_and_swap<mode>_1): Add new ARMv8-M
    Baseline only alternatives to (i) hold store atomic success value in a
    return register rather than a scratch register, (ii) use a low register
    for it and to (iii) ensure the cbranchsi insn generated by the split
    respect the constraints of Thumb-1 cbranchsi4_insn and
    cbranchsi4_scratch.
    * config/arm/thumb1.md (cbranchsi4_insn): Add comment to indicate
    constraints must match those in atomic_compare_and_swap.
    (cbranchsi4_scratch): Likewise.

From-SVN: r241578

1 files changed, 6 insertions, 0 deletions

diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index cd98de7..67f2878 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -1059,6 +1059,9 @@
 	    (const_string "multiple")))]
 )
 
+;; Changes to the constraints of this pattern must be propagated to those of
+;; atomic compare_and_swap splitters in sync.md.  These must be at least as
+;; strict as the constraints here and aim to be as permissive.
 (define_insn "cbranchsi4_insn"
   [(set (pc) (if_then_else
 	      (match_operator 0 "arm_comparison_operator"
@@ -1120,6 +1123,9 @@
    (set_attr "type" "multiple")]
 )
 
+;; Changes to the constraints of this pattern must be propagated to those of
+;; atomic compare_and_swap splitters in sync.md.  These must be at least as
+;; strict as the constraints here and aim to be as permissive.
 (define_insn "cbranchsi4_scratch"
   [(set (pc) (if_then_else
 	      (match_operator 4 "arm_comparison_operator"