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author | Christophe Lyon <christophe.lyon@linaro.org> | 2023-06-28 14:29:15 +0000 |
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committer | Christophe Lyon <christophe.lyon@linaro.org> | 2023-07-14 21:28:55 +0000 |
commit | b22e70e8e97176561357f0ddcd84af889eb6b317 (patch) | |
tree | f90251925e4443c731842e170d687ae10cba6ec0 /gcc/config/arm/iterators.md | |
parent | 43a0a5cd57eefd5a5bbead606ec4f6959af31802 (diff) | |
download | gcc-b22e70e8e97176561357f0ddcd84af889eb6b317.zip gcc-b22e70e8e97176561357f0ddcd84af889eb6b317.tar.gz gcc-b22e70e8e97176561357f0ddcd84af889eb6b317.tar.bz2 |
arm: [MVE intrinsics] Factorize vcaddq vhcaddq
Factorize vcaddq, vhcaddq so that they use the same parameterized
names.
To be able to use the same patterns, we add a suffix to vcaddq.
Note that vcadd uses UNSPEC_VCADDxx for builtins without predication,
and VCADDQ_ROTxx_M_x (that is, not starting with "UNSPEC_"). The
UNPEC_* names are also used by neon.md
2023-07-13 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
(vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
* config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
(isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
VHCADDQ_ROT270_S.
(rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
VHCADDQ_ROT270_M_S.
(mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
(supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
UNSPEC_VCADD270.
(VCADDQ_ROT270_M): Delete.
(VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
(VCADDQ_ROT90_M): Delete.
* config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
(mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
into ...
(@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
(mve_vcaddq<mve_rot><mode>): Rename into ...
(@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
(mve_vcaddq_rot270_m_<supf><mode>)
(mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
(mve_vhcaddq_rot90_m_s<mode>): Merge into ...
(@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
(mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
into ...
(@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
Diffstat (limited to 'gcc/config/arm/iterators.md')
-rw-r--r-- | gcc/config/arm/iterators.md | 38 |
1 files changed, 36 insertions, 2 deletions
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 9e77af5..da1ead3 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -902,6 +902,7 @@ ]) (define_int_attr mve_insn [ + (UNSPEC_VCADD90 "vcadd") (UNSPEC_VCADD270 "vcadd") (VABAVQ_P_S "vabav") (VABAVQ_P_U "vabav") (VABAVQ_S "vabav") (VABAVQ_U "vabav") (VABDQ_M_S "vabd") (VABDQ_M_U "vabd") (VABDQ_M_F "vabd") @@ -925,6 +926,8 @@ (VBICQ_N_S "vbic") (VBICQ_N_U "vbic") (VBRSRQ_M_N_S "vbrsr") (VBRSRQ_M_N_U "vbrsr") (VBRSRQ_M_N_F "vbrsr") (VBRSRQ_N_S "vbrsr") (VBRSRQ_N_U "vbrsr") (VBRSRQ_N_F "vbrsr") + (VCADDQ_ROT270_M_U "vcadd") (VCADDQ_ROT270_M_S "vcadd") (VCADDQ_ROT270_M_F "vcadd") + (VCADDQ_ROT90_M_U "vcadd") (VCADDQ_ROT90_M_S "vcadd") (VCADDQ_ROT90_M_F "vcadd") (VCLSQ_M_S "vcls") (VCLSQ_S "vcls") (VCLZQ_M_S "vclz") (VCLZQ_M_U "vclz") @@ -944,6 +947,8 @@ (VHADDQ_M_S "vhadd") (VHADDQ_M_U "vhadd") (VHADDQ_N_S "vhadd") (VHADDQ_N_U "vhadd") (VHADDQ_S "vhadd") (VHADDQ_U "vhadd") + (VHCADDQ_ROT90_M_S "vhcadd") (VHCADDQ_ROT270_M_S "vhcadd") + (VHCADDQ_ROT90_S "vhcadd") (VHCADDQ_ROT270_S "vhcadd") (VHSUBQ_M_N_S "vhsub") (VHSUBQ_M_N_U "vhsub") (VHSUBQ_M_S "vhsub") (VHSUBQ_M_U "vhsub") (VHSUBQ_N_S "vhsub") (VHSUBQ_N_U "vhsub") @@ -1190,7 +1195,10 @@ ]) (define_int_attr isu [ + (UNSPEC_VCADD90 "i") (UNSPEC_VCADD270 "i") (VABSQ_M_S "s") + (VCADDQ_ROT270_M_U "i") (VCADDQ_ROT270_M_S "i") + (VCADDQ_ROT90_M_U "i") (VCADDQ_ROT90_M_S "i") (VCLSQ_M_S "s") (VCLZQ_M_S "i") (VCLZQ_M_U "i") @@ -1214,6 +1222,8 @@ (VCMPNEQ_M_N_U "i") (VCMPNEQ_M_S "i") (VCMPNEQ_M_U "i") + (VHCADDQ_ROT90_M_S "s") (VHCADDQ_ROT270_M_S "s") + (VHCADDQ_ROT90_S "s") (VHCADDQ_ROT270_S "s") (VMOVNBQ_M_S "i") (VMOVNBQ_M_U "i") (VMOVNBQ_S "i") (VMOVNBQ_U "i") (VMOVNTQ_M_S "i") (VMOVNTQ_M_U "i") @@ -2155,6 +2165,16 @@ (define_int_attr rot [(UNSPEC_VCADD90 "90") (UNSPEC_VCADD270 "270") + (VCADDQ_ROT90_M_F "90") + (VCADDQ_ROT90_M_S "90") + (VCADDQ_ROT90_M_U "90") + (VCADDQ_ROT270_M_F "270") + (VCADDQ_ROT270_M_S "270") + (VCADDQ_ROT270_M_U "270") + (VHCADDQ_ROT90_S "90") + (VHCADDQ_ROT270_S "270") + (VHCADDQ_ROT90_M_S "90") + (VHCADDQ_ROT270_M_S "270") (UNSPEC_VCMUL "0") (UNSPEC_VCMUL90 "90") (UNSPEC_VCMUL180 "180") @@ -2193,6 +2213,16 @@ (define_int_attr mve_rot [(UNSPEC_VCADD90 "_rot90") (UNSPEC_VCADD270 "_rot270") + (VCADDQ_ROT90_M_F "_rot90") + (VCADDQ_ROT90_M_S "_rot90") + (VCADDQ_ROT90_M_U "_rot90") + (VCADDQ_ROT270_M_F "_rot270") + (VCADDQ_ROT270_M_S "_rot270") + (VCADDQ_ROT270_M_U "_rot270") + (VHCADDQ_ROT90_S "_rot90") + (VHCADDQ_ROT270_S "_rot270") + (VHCADDQ_ROT90_M_S "_rot90") + (VHCADDQ_ROT270_M_S "_rot270") (UNSPEC_VCMLA "") (UNSPEC_VCMLA90 "_rot90") (UNSPEC_VCMLA180 "_rot180") @@ -2535,6 +2565,9 @@ (VRMLALDAVHAQ_P_S "s") (VRMLALDAVHAQ_P_U "u") (VQSHLUQ_M_N_S "s") (VQSHLUQ_N_S "s") + (VHCADDQ_ROT90_M_S "s") (VHCADDQ_ROT270_M_S "s") + (VHCADDQ_ROT90_S "s") (VHCADDQ_ROT270_S "s") + (UNSPEC_VCADD90 "") (UNSPEC_VCADD270 "") ]) ;; Both kinds of return insn. @@ -2767,7 +2800,9 @@ (define_int_iterator VANDQ_M [VANDQ_M_U VANDQ_M_S]) (define_int_iterator VBICQ_M [VBICQ_M_U VBICQ_M_S]) (define_int_iterator VSHLQ_M_N [VSHLQ_M_N_S VSHLQ_M_N_U]) -(define_int_iterator VCADDQ_ROT270_M [VCADDQ_ROT270_M_U VCADDQ_ROT270_M_S]) +(define_int_iterator VCADDQ_M_F [VCADDQ_ROT90_M_F VCADDQ_ROT270_M_F]) +(define_int_iterator VxCADDQ [UNSPEC_VCADD90 UNSPEC_VCADD270 VHCADDQ_ROT90_S VHCADDQ_ROT270_S]) +(define_int_iterator VxCADDQ_M [VHCADDQ_ROT90_M_S VHCADDQ_ROT270_M_S VCADDQ_ROT90_M_U VCADDQ_ROT90_M_S VCADDQ_ROT270_M_U VCADDQ_ROT270_M_S]) (define_int_iterator VQRSHLQ_M [VQRSHLQ_M_U VQRSHLQ_M_S]) (define_int_iterator VQADDQ_M_N [VQADDQ_M_N_U VQADDQ_M_N_S]) (define_int_iterator VADDQ_M_N [VADDQ_M_N_S VADDQ_M_N_U]) @@ -2777,7 +2812,6 @@ (define_int_iterator VMLADAVAQ_P [VMLADAVAQ_P_U VMLADAVAQ_P_S]) (define_int_iterator VBRSRQ_M_N [VBRSRQ_M_N_U VBRSRQ_M_N_S]) (define_int_iterator VMULQ_M_N [VMULQ_M_N_U VMULQ_M_N_S]) -(define_int_iterator VCADDQ_ROT90_M [VCADDQ_ROT90_M_U VCADDQ_ROT90_M_S]) (define_int_iterator VMULLTQ_INT_M [VMULLTQ_INT_M_S VMULLTQ_INT_M_U]) (define_int_iterator VEORQ_M [VEORQ_M_S VEORQ_M_U]) (define_int_iterator VSHRQ_M_N [VSHRQ_M_N_S VSHRQ_M_N_U]) |