diff options
| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2019-11-07 10:49:06 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2019-11-07 10:49:06 +0000 |
| commit | 65dd610dcbcf5e1a952f341d0a441593bebe200f (patch) | |
| tree | f9325cafb9706e72c4560efda43a4fcabb90a689 /gcc/config/arm/arm_acle.h | |
| parent | 16155ccf588a403c033ccd7743329671bcfb27d5 (diff) | |
| download | gcc-65dd610dcbcf5e1a952f341d0a441593bebe200f.zip gcc-65dd610dcbcf5e1a952f341d0a441593bebe200f.tar.gz gcc-65dd610dcbcf5e1a952f341d0a441593bebe200f.tar.bz2 | |
[arm][5/X] Implement Q-bit-setting SIMD32 intrinsics
This patch implements some more Q-setting intrinsics of the
multiply-accumulate
variety, but these are in the SIMD32 family in that they treat their
operands as packed SIMD values, but that's not important at the RTL level.
* config/arm/arm.md (arm_<simd32_op><add_clobber_q_name>_insn):
New define_insns.
(arm_<simd32_op>): New define_expands.
* config/arm/arm_acle.h (__smlad, __smladx, __smlsd, __smlsdx,
__smuad, __smuadx): Define.
* config/arm/arm_acle_builtins.def: Define builtins for the above.
* config/arm/iterators.md (SIMD32_TERNOP_Q): New int_iterator.
(SIMD32_BINOP_Q): Likewise.
(simd32_op): Handle the above.
* config/arm/unspecs.md: Define unspecs for the above.
* gcc.target/arm/acle/simd32.c: Update test.
From-SVN: r277918
Diffstat (limited to 'gcc/config/arm/arm_acle.h')
| -rw-r--r-- | gcc/config/arm/arm_acle.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/gcc/config/arm/arm_acle.h b/gcc/config/arm/arm_acle.h index b8d02a5..c30645e 100644 --- a/gcc/config/arm/arm_acle.h +++ b/gcc/config/arm/arm_acle.h @@ -522,6 +522,48 @@ __usub16 (uint16x2_t __a, uint16x2_t __b) return __builtin_arm_usub16 (__a, __b); } +__extension__ extern __inline int32_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__smlad (int16x2_t __a, int16x2_t __b, int32_t __c) +{ + return __builtin_arm_smlad (__a, __b, __c); +} + +__extension__ extern __inline int32_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__smladx (int16x2_t __a, int16x2_t __b, int32_t __c) +{ + return __builtin_arm_smladx (__a, __b, __c); +} + +__extension__ extern __inline int32_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__smlsd (int16x2_t __a, int16x2_t __b, int32_t __c) +{ + return __builtin_arm_smlsd (__a, __b, __c); +} + +__extension__ extern __inline int32_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__smlsdx (int16x2_t __a, int16x2_t __b, int32_t __c) +{ + return __builtin_arm_smlsdx (__a, __b, __c); +} + +__extension__ extern __inline int32_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__smuad (int16x2_t __a, int16x2_t __b) +{ + return __builtin_arm_smuad (__a, __b); +} + +__extension__ extern __inline int32_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__smuadx (int16x2_t __a, int16x2_t __b) +{ + return __builtin_arm_smuadx (__a, __b); +} + #endif #ifdef __ARM_FEATURE_SAT |