alpha.c, [...]: Follow spelling conventions.

	* config/alpha/alpha.c, config/alpha/alpha.md,
	config/alpha/lib1funcs.asm, config/alpha/vms-crt0-64.c,
	config/alpha/vms-psxcrt0-64.c, config/arc/arc.c,
	config/arc/arc.h, config/arm/arm.c, config/arm/arm.md,
	config/arm/lib1funcs.asm: Follow spelling conventions.

From-SVN: r122150

2 files changed, 9 insertions, 9 deletions

diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 78a95f4..919f03b 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -262,7 +262,7 @@ arc_select_cc_mode (enum rtx_code op,
    indexed by hard register number, and one indexed by mode.  */
 
 /* The purpose of arc_mode_class is to shrink the range of modes so that
-   they all fit (as bit numbers) in a 32 bit word (again).  Each real mode is
+   they all fit (as bit numbers) in a 32-bit word (again).  Each real mode is
    mapped into one arc_mode_class mode.  */
 
 enum arc_mode_class {
@@ -479,7 +479,7 @@ long_immediate_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
     case CONST_INT :
       return !SMALL_INT (INTVAL (op));
     case CONST_DOUBLE :
-      /* These can happen because large unsigned 32 bit constants are
+      /* These can happen because large unsigned 32-bit constants are
 	 represented this way (the multiplication patterns can cause these
 	 to be generated).  They also occur for SFmode values.  */
       return 1;
@@ -516,7 +516,7 @@ long_immediate_loadstore_operand (rtx op,
 	 assume that it does.  */
       return 1;
     case CONST_DOUBLE :
-      /* These can happen because large unsigned 32 bit constants are
+      /* These can happen because large unsigned 32-bit constants are
 	 represented this way (the multiplication patterns can cause these
 	 to be generated).  They also occur for SFmode values.  */
       return 1;
@@ -550,10 +550,10 @@ move_src_operand (rtx op, enum machine_mode mode)
     case CONST_DOUBLE :
       /* We can handle DImode integer constants in SImode if the value
 	 (signed or unsigned) will fit in 32 bits.  This is needed because
-	 large unsigned 32 bit constants are represented as CONST_DOUBLEs.  */
+	 large unsigned 32-bit constants are represented as CONST_DOUBLEs.  */
       if (mode == SImode)
 	return arc_double_limm_p (op);
-      /* We can handle 32 bit floating point constants.  */
+      /* We can handle 32-bit floating point constants.  */
       if (mode == SFmode)
 	return GET_MODE (op) == SFmode;
       return 0;
diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 9b9f2d6..69ec637 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -430,7 +430,7 @@ extern enum reg_class arc_regno_reg_class[FIRST_PSEUDO_REGISTER];
    Here VALUE is the CONST_DOUBLE rtx itself.  */
 /* 'G' is used for integer values for the multiplication insns where the
    operands are extended from 4 bytes to 8 bytes.
-   'H' is used when any 64 bit constant is allowed.  */
+   'H' is used when any 64-bit constant is allowed.  */
 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
 ((C) == 'G' ? arc_double_limm_p (VALUE) \
  : (C) == 'H' ? 1 \
@@ -671,7 +671,7 @@ arc_eligible_for_epilogue_delay (TRIAL, SLOTS_FILLED)
 
 /* Output assembler code for a block containing the constant parts
    of a trampoline, leaving space for the variable parts.  */
-/* On the ARC, the trampoline is quite simple as we have 32 bit immediate
+/* On the ARC, the trampoline is quite simple as we have 32-bit immediate
    constants.
 
 	mov r24,STATIC
@@ -714,7 +714,7 @@ do { \
  || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
 
 /* Nonzero if the constant value X is a legitimate general operand.
-   We can handle any 32 or 64 bit constant.  */
+   We can handle any 32- or 64-bit constant.  */
 /* "1" should work since the largest constant should be a 64 bit critter.  */
 /* ??? Not sure what to do for 64x32 compiler.  */
 #define LEGITIMATE_CONSTANT_P(X) 1
@@ -1060,7 +1060,7 @@ do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0)
 /* Specify the machine mode that pointers have.
    After generation of rtl, the compiler makes no further distinction
    between pointers and any other objects of this machine mode.  */
-/* ??? The arc doesn't have full 32 bit pointers, but making this PSImode has
+/* ??? The arc doesn't have full 32-bit pointers, but making this PSImode has
    its own problems (you have to add extendpsisi2 and trucnsipsi2 but how does
    one do it without getting excess code?).  Try to avoid it.  */
 #define Pmode SImode