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authorClaudiu Zissulescu <claziss@synopsys.com>2019-03-06 11:45:51 +0100
committerClaudiu Zissulescu <claziss@gcc.gnu.org>2019-03-06 11:45:51 +0100
commit9f54ba8f7dfb00d834893a746db141a409778ad9 (patch)
tree6014d029848146d70216ca5462aea848b1881345 /gcc/config/arc
parent3050b357660bf0425e0ac63c22960d2ec3af4572 (diff)
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[ARC] Fix logic set UNALIGNED_ACCESS
gcc/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc-c.def (__ARC_UNALIGNED__): Set it on unaligned_access variable. * config/arc/arc.c (arc_override_options): Set unaligned access default on for HS CPUs. * config/arc/arc.h (STRICT_ALIGNMENT): Fix logic. From-SVN: r269417
Diffstat (limited to 'gcc/config/arc')
-rw-r--r--gcc/config/arc/arc-c.def2
-rw-r--r--gcc/config/arc/arc.c4
-rw-r--r--gcc/config/arc/arc.h2
3 files changed, 6 insertions, 2 deletions
diff --git a/gcc/config/arc/arc-c.def b/gcc/config/arc/arc-c.def
index 9c0ba2c..9472b48 100644
--- a/gcc/config/arc/arc-c.def
+++ b/gcc/config/arc/arc-c.def
@@ -29,7 +29,7 @@ ARC_C_DEF ("__ARC_MUL64__", TARGET_MUL64_SET)
ARC_C_DEF ("__ARC_MUL32BY16__", TARGET_MULMAC_32BY16_SET)
ARC_C_DEF ("__ARC_SIMD__", TARGET_SIMD_SET)
ARC_C_DEF ("__ARC_RF16__", TARGET_RF16)
-ARC_C_DEF ("__ARC_UNALIGNED__", !STRICT_ALIGNMENT)
+ARC_C_DEF ("__ARC_UNALIGNED__", unaligned_access)
ARC_C_DEF ("__ARC_BARREL_SHIFTER__", TARGET_BARREL_SHIFTER)
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index de2c8d5..3b8c299 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -1313,6 +1313,10 @@ arc_override_options (void)
if (TARGET_LONG_CALLS_SET)
target_flags &= ~MASK_MILLICODE_THUNK_SET;
+ /* Set unaligned to all HS cpus. */
+ if (!global_options_set.x_unaligned_access && TARGET_HS)
+ unaligned_access = 1;
+
/* These need to be done at start up. It's convenient to do them here. */
arc_init ();
}
diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 12b4b62..894eb39 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -285,7 +285,7 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \
/* On the ARC the lower address bits are masked to 0 as necessary. The chip
won't croak when given an unaligned address, but the insn will still fail
to produce the correct result. */
-#define STRICT_ALIGNMENT (!unaligned_access && !TARGET_HS)
+#define STRICT_ALIGNMENT (!unaligned_access)
/* Layout of source language data types. */