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author | Claudiu Zissulescu <claziss@gmail.com> | 2020-02-13 12:32:05 +0200 |
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committer | Claudiu Zissulescu <claziss@gmail.com> | 2020-02-13 12:32:05 +0200 |
commit | e57764be555e4a6162ac2776a98d91f93307eccf (patch) | |
tree | 2a81d3623a529a1fb8a6500d1fe1bad1f7c16c88 /gcc/config/arc/arc.c | |
parent | 8dca38c43c98cd02a961306d42f3e8cbc2269b5d (diff) | |
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[ARC] Use TARGET_INSN_COST.
TARGET_INSN_COST gives us a better control over the instruction costs
than classical RTX_COSTS. A simple cost scheme is in place for the
time being, when optimizing for size, the cost is given by the
instruction length. When optimizing for speed, the cost is 1 for any
recognized instruction, and 2 for any load/store instruction. The
latter one can be overwritten by using cost attribute for an
instruction. Due to this change, we need to update also a number of
instruction patterns with a new predicate to better reflect the costs.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_insn_cost): New function.
(TARGET_INSN_COST): Define.
* config/arc/arc.md (cost): New attribute.
(add_n): Use arc_nonmemory_operand.
(ashlsi3_insn): Likewise, also update constraints.
(ashrsi3_insn): Likewise.
(rotrsi3): Likewise.
(add_shift): Likewise.
* config/arc/predicates.md (arc_nonmemory_operand): New predicate.
testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/or-cnst-size2.c: Update test.
Diffstat (limited to 'gcc/config/arc/arc.c')
-rw-r--r-- | gcc/config/arc/arc.c | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index bc34235..7a9fe08 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -11757,6 +11757,55 @@ arc_can_use_return_insn (void) && !ARC_INTERRUPT_P (arc_compute_function_type (cfun))); } +/* Helper for INSN_COST. + + Per Segher Boessenkool: rtx_costs computes the cost for any rtx (an + insn, a set, a set source, any random piece of one). set_src_cost, + set_rtx_cost, etc. are helper functions that use that. + + Those functions do not work for parallels. Also, costs are not + additive like this simplified model assumes. Also, more complex + backends tend to miss many cases in their rtx_costs function. + + Many passes that want costs want to know the cost of a full insn. Like + combine. That's why I created insn_cost: it solves all of the above + problems. */ + +static int +arc_insn_cost (rtx_insn *insn, bool speed) +{ + int cost; + if (recog_memoized (insn) < 0) + return 0; + + /* If optimizing for size, we want the insn size. */ + if (!speed) + return get_attr_length (insn); + + /* Use cost if provided. */ + cost = get_attr_cost (insn); + if (cost > 0) + return cost; + + /* For speed make a simple cost model: memory access is more + expensive than any other instruction. */ + enum attr_type type = get_attr_type (insn); + + switch (type) + { + case TYPE_LOAD: + case TYPE_STORE: + cost = COSTS_N_INSNS (2); + break; + + default: + cost = COSTS_N_INSNS (1); + break; + } + + return cost; +} + #undef TARGET_USE_ANCHORS_FOR_SYMBOL_P #define TARGET_USE_ANCHORS_FOR_SYMBOL_P arc_use_anchors_for_symbol_p @@ -11778,6 +11827,9 @@ arc_can_use_return_insn (void) #undef TARGET_MEMORY_MOVE_COST #define TARGET_MEMORY_MOVE_COST arc_memory_move_cost +#undef TARGET_INSN_COST +#define TARGET_INSN_COST arc_insn_cost + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-arc.h" |