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author | Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com> | 2022-07-25 10:27:13 +0100 |
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committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2022-07-25 10:27:13 +0100 |
commit | eb966d393dfdfd2c80994e4bfcc0dddf85828a73 (patch) | |
tree | 30bf9c54e6eca028e906ccad484728006c2cf0d2 /gcc/config/aarch64 | |
parent | 718cf8d0bd32689192200d2156722167fd21a647 (diff) | |
download | gcc-eb966d393dfdfd2c80994e4bfcc0dddf85828a73.zip gcc-eb966d393dfdfd2c80994e4bfcc0dddf85828a73.tar.gz gcc-eb966d393dfdfd2c80994e4bfcc0dddf85828a73.tar.bz2 |
aarch64: Implement ACLE Data Intrinsics
This patch adds support for the ACLE Data Intrinsics to the AArch64 port.
gcc/ChangeLog:
2022-07-25 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/aarch64/aarch64.md (rbit<mode>2): Rename this ...
(@aarch64_rbit<mode>): ... to this and change it in...
(ffs<mode>2,ctz<mode>2): ... here.
(@aarch64_rev16<mode>): New.
* config/aarch64/aarch64-builtins.cc: (aarch64_builtins):
Define the following enum AARCH64_REV16, AARCH64_REV16L,
AARCH64_REV16LL, AARCH64_RBIT, AARCH64_RBITL, AARCH64_RBITLL.
(aarch64_init_data_intrinsics): New.
(aarch64_general_init_builtins): Add call to
aarch64_init_data_intrinsics.
(aarch64_expand_builtin_data_intrinsic): New.
(aarch64_general_expand_builtin): Add call to
aarch64_expand_builtin_data_intrinsic.
* config/aarch64/arm_acle.h (__clz, __clzl, __clzll, __cls, __clsl,
__clsll, __rbit, __rbitl, __rbitll, __rev, __revl, __revll, __rev16,
__rev16l, __rev16ll, __ror, __rorl, __rorll, __revsh): New.
gcc/testsuite/ChangeLog:
2022-07-25 Andre Vieira <andre.simoesdiasvieira@arm.com>
* gcc.target/aarch64/acle/data-intrinsics.c: New test.
Diffstat (limited to 'gcc/config/aarch64')
-rw-r--r-- | gcc/config/aarch64/aarch64-builtins.cc | 71 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.md | 13 | ||||
-rw-r--r-- | gcc/config/aarch64/arm_acle.h | 53 |
3 files changed, 134 insertions, 3 deletions
diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc index 69f1e4e..2cacb4d 100644 --- a/gcc/config/aarch64/aarch64-builtins.cc +++ b/gcc/config/aarch64/aarch64-builtins.cc @@ -612,6 +612,12 @@ enum aarch64_builtins AARCH64_LS64_BUILTIN_ST64B, AARCH64_LS64_BUILTIN_ST64BV, AARCH64_LS64_BUILTIN_ST64BV0, + AARCH64_REV16, + AARCH64_REV16L, + AARCH64_REV16LL, + AARCH64_RBIT, + AARCH64_RBITL, + AARCH64_RBITLL, AARCH64_BUILTIN_MAX }; @@ -1659,6 +1665,36 @@ aarch64_init_ls64_builtins (void) = aarch64_general_add_builtin (data[i].name, data[i].type, data[i].code); } +static void +aarch64_init_data_intrinsics (void) +{ + tree uint32_fntype = build_function_type_list (uint32_type_node, + uint32_type_node, NULL_TREE); + tree ulong_fntype = build_function_type_list (long_unsigned_type_node, + long_unsigned_type_node, + NULL_TREE); + tree uint64_fntype = build_function_type_list (uint64_type_node, + uint64_type_node, NULL_TREE); + aarch64_builtin_decls[AARCH64_REV16] + = aarch64_general_add_builtin ("__builtin_aarch64_rev16", uint32_fntype, + AARCH64_REV16); + aarch64_builtin_decls[AARCH64_REV16L] + = aarch64_general_add_builtin ("__builtin_aarch64_rev16l", ulong_fntype, + AARCH64_REV16L); + aarch64_builtin_decls[AARCH64_REV16LL] + = aarch64_general_add_builtin ("__builtin_aarch64_rev16ll", uint64_fntype, + AARCH64_REV16LL); + aarch64_builtin_decls[AARCH64_RBIT] + = aarch64_general_add_builtin ("__builtin_aarch64_rbit", uint32_fntype, + AARCH64_RBIT); + aarch64_builtin_decls[AARCH64_RBITL] + = aarch64_general_add_builtin ("__builtin_aarch64_rbitl", ulong_fntype, + AARCH64_RBITL); + aarch64_builtin_decls[AARCH64_RBITLL] + = aarch64_general_add_builtin ("__builtin_aarch64_rbitll", uint64_fntype, + AARCH64_RBITLL); +} + /* Implement #pragma GCC aarch64 "arm_acle.h". */ void handle_arm_acle_h (void) @@ -1737,6 +1773,7 @@ aarch64_general_init_builtins (void) aarch64_init_crc32_builtins (); aarch64_init_builtin_rsqrt (); aarch64_init_rng_builtins (); + aarch64_init_data_intrinsics (); tree ftype_jcvt = build_function_type_list (intSI_type_node, double_type_node, NULL); @@ -2389,6 +2426,37 @@ aarch64_expand_builtin_memtag (int fcode, tree exp, rtx target) return target; } +/* Function to expand an expression EXP which calls one of the ACLE Data + Intrinsic builtins FCODE with the result going to TARGET. */ +static rtx +aarch64_expand_builtin_data_intrinsic (unsigned int fcode, tree exp, rtx target) +{ + expand_operand ops[2]; + machine_mode mode = GET_MODE (target); + create_output_operand (&ops[0], target, mode); + create_input_operand (&ops[1], expand_normal (CALL_EXPR_ARG (exp, 0)), mode); + enum insn_code icode; + + switch (fcode) + { + case AARCH64_REV16: + case AARCH64_REV16L: + case AARCH64_REV16LL: + icode = code_for_aarch64_rev16 (mode); + break; + case AARCH64_RBIT: + case AARCH64_RBITL: + case AARCH64_RBITLL: + icode = code_for_aarch64_rbit (mode); + break; + default: + gcc_unreachable (); + } + + expand_insn (icode, 2, ops); + return ops[0].value; +} + /* Expand an expression EXP as fpsr or fpcr setter (depending on UNSPEC) using MODE. */ static void @@ -2546,6 +2614,9 @@ aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target, if (fcode >= AARCH64_MEMTAG_BUILTIN_START && fcode <= AARCH64_MEMTAG_BUILTIN_END) return aarch64_expand_builtin_memtag (fcode, exp, target); + if (fcode >= AARCH64_REV16 + && fcode <= AARCH64_RBITLL) + return aarch64_expand_builtin_data_intrinsic (fcode, exp, target); gcc_unreachable (); } diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index acec8c1..ef0aed2 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -4950,7 +4950,7 @@ rtx ccreg = aarch64_gen_compare_reg (EQ, operands[1], const0_rtx); rtx x = gen_rtx_NE (VOIDmode, ccreg, const0_rtx); - emit_insn (gen_rbit<mode>2 (operands[0], operands[1])); + emit_insn (gen_aarch64_rbit (<MODE>mode, operands[0], operands[1])); emit_insn (gen_clz<mode>2 (operands[0], operands[0])); emit_insn (gen_csinc3<mode>_insn (operands[0], x, operands[0], const0_rtx)); DONE; @@ -4996,7 +4996,7 @@ [(set_attr "type" "clz")] ) -(define_insn "rbit<mode>2" +(define_insn "@aarch64_rbit<mode>" [(set (match_operand:GPI 0 "register_operand" "=r") (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_RBIT))] "" @@ -5017,7 +5017,7 @@ "reload_completed" [(const_int 0)] " - emit_insn (gen_rbit<mode>2 (operands[0], operands[1])); + emit_insn (gen_aarch64_rbit (<MODE>mode, operands[0], operands[1])); emit_insn (gen_clz<mode>2 (operands[0], operands[0])); DONE; ") @@ -6022,6 +6022,13 @@ [(set_attr "type" "rev")] ) +(define_insn "@aarch64_rev16<mode>" + [(set (match_operand:GPI 0 "register_operand" "=r") + (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_REV))] + "" + "rev16\\t%<w>0, %<w>1" + [(set_attr "type" "rev")]) + (define_insn "*aarch64_bfxil<mode>" [(set (match_operand:GPI 0 "register_operand" "=r,r") (ior:GPI (and:GPI (match_operand:GPI 1 "register_operand" "r,0") diff --git a/gcc/config/aarch64/arm_acle.h b/gcc/config/aarch64/arm_acle.h index 9775a48..d26e269 100644 --- a/gcc/config/aarch64/arm_acle.h +++ b/gcc/config/aarch64/arm_acle.h @@ -28,6 +28,7 @@ #define _GCC_ARM_ACLE_H #include <stdint.h> +#include <stddef.h> #pragma GCC aarch64 "arm_acle.h" @@ -35,6 +36,58 @@ extern "C" { #endif +#define _GCC_ARM_ACLE_ROR_FN(NAME, TYPE) \ +__extension__ extern __inline TYPE \ +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) \ +NAME (TYPE __value, uint32_t __rotate) \ +{ \ + size_t __size = sizeof (TYPE) * __CHAR_BIT__; \ + __rotate = __rotate % __size; \ + return __value >> __rotate | __value << ((__size - __rotate) % __size); \ +} + +_GCC_ARM_ACLE_ROR_FN (__ror, uint32_t) +_GCC_ARM_ACLE_ROR_FN (__rorl, unsigned long) +_GCC_ARM_ACLE_ROR_FN (__rorll, uint64_t) + +#undef _GCC_ARM_ACLE_ROR_FN + +#define _GCC_ARM_ACLE_DATA_FN(NAME, BUILTIN, ITYPE, RTYPE) \ +__extension__ extern __inline RTYPE \ +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) \ +__##NAME (ITYPE __value) \ +{ \ + return __builtin_##BUILTIN (__value); \ +} + +_GCC_ARM_ACLE_DATA_FN (clz, clz, uint32_t, unsigned int) +_GCC_ARM_ACLE_DATA_FN (clzl, clzl, unsigned long, unsigned int) +_GCC_ARM_ACLE_DATA_FN (clzll, clzll, uint64_t, unsigned int) +_GCC_ARM_ACLE_DATA_FN (cls, clrsb, uint32_t, unsigned int) +_GCC_ARM_ACLE_DATA_FN (clsl, clrsbl, unsigned long, unsigned int) +_GCC_ARM_ACLE_DATA_FN (clsll, clrsbll, uint64_t, unsigned int) +_GCC_ARM_ACLE_DATA_FN (rev16, aarch64_rev16, uint32_t, uint32_t) +_GCC_ARM_ACLE_DATA_FN (rev16l, aarch64_rev16l, unsigned long, unsigned long) +_GCC_ARM_ACLE_DATA_FN (rev16ll, aarch64_rev16ll, uint64_t, uint64_t) +_GCC_ARM_ACLE_DATA_FN (rbit, aarch64_rbit, uint32_t, uint32_t) +_GCC_ARM_ACLE_DATA_FN (rbitl, aarch64_rbitl, unsigned long, unsigned long) +_GCC_ARM_ACLE_DATA_FN (rbitll, aarch64_rbitll, uint64_t, uint64_t) +_GCC_ARM_ACLE_DATA_FN (revsh, bswap16, int16_t, int16_t) +_GCC_ARM_ACLE_DATA_FN (rev, bswap32, uint32_t, uint32_t) +_GCC_ARM_ACLE_DATA_FN (revll, bswap64, uint64_t, uint64_t) + +#undef _GCC_ARM_ACLE_DATA_FN + +__extension__ extern __inline unsigned long +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__revl (unsigned long __value) +{ + if (sizeof (unsigned long) == 8) + return __revll (__value); + else + return __rev (__value); +} + #pragma GCC push_options #pragma GCC target ("arch=armv8.3-a") __extension__ extern __inline int32_t |