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authorZhenqiang Chen <zhenqiang.chen@linaro.org>2014-11-17 06:19:08 +0000
committerZhenqiang Chen <zqchen@gcc.gnu.org>2014-11-17 06:19:08 +0000
commitcf67050334d42b14a7eecf2d503a96c1d284fbfd (patch)
tree58ea5ad6ce642b9ab1f52b859ac9862cdd7cf585 /gcc/config/aarch64/predicates.md
parent3dfa7055cb669a887776e3cce78374df069de4ad (diff)
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aarch64-protos.h (aarch64_ccmp_mode_to_code): New.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> * config/aarch64/aarch64-protos.h (aarch64_ccmp_mode_to_code): New. * aarch64.c (aarch64_nzcv_codes): New data. (aarch64_ccmp_mode_to_code): New. (aarch64_print_operand): Output nzcv. config/aarch64/aarch64.md (cbranchcc4, *ccmp_and, *ccmp_ior, cstorecc4): New patterns. (cstore<mode>4): Handle ccmp_cc_register. * config/aarch64/predicates.md (const0_operand): New. From-SVN: r217644
Diffstat (limited to 'gcc/config/aarch64/predicates.md')
-rw-r--r--gcc/config/aarch64/predicates.md5
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index f6fe58c..7129203 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -30,6 +30,11 @@
(ior (match_code "symbol_ref")
(match_operand 0 "register_operand")))
+;; Return true if OP a (const_int 0) operand.
+(define_predicate "const0_operand"
+ (and (match_code "const_int, const_double")
+ (match_test "op == CONST0_RTX (mode)")))
+
(define_predicate "aarch64_ccmp_immediate"
(and (match_code "const_int")
(match_test "IN_RANGE (INTVAL (op), -31, 31)")))