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authorZhenqiang Chen <zhenqiang.chen@linaro.org>2014-11-17 06:07:15 +0000
committerZhenqiang Chen <zqchen@gcc.gnu.org>2014-11-17 06:07:15 +0000
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parentf06cd23dc761a7769f8bdca26a42db59b71dec54 (diff)
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constraints.md (Usn, [...]): New constraints.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> * config/aarch64/constraints.md (Usn, aarch64_ccmp_immediate, aarch64_ccmp_operand): New constraints. From-SVN: r217642
Diffstat (limited to 'gcc/config/aarch64/predicates.md')
-rw-r--r--gcc/config/aarch64/predicates.md8
1 files changed, 8 insertions, 0 deletions
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index d5b0b2a..aa8f6f6 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -30,6 +30,14 @@
(ior (match_code "symbol_ref")
(match_operand 0 "register_operand")))
+(define_predicate "aarch64_ccmp_immediate"
+ (and (match_code "const_int")
+ (match_test "IN_RANGE (INTVAL (op), -31, 31)")))
+
+(define_predicate "aarch64_ccmp_operand"
+ (ior (match_operand 0 "register_operand")
+ (match_operand 0 "aarch64_ccmp_immediate")))
+
(define_predicate "aarch64_simd_register"
(and (match_code "reg")
(ior (match_test "REGNO_REG_CLASS (REGNO (op)) == FP_LO_REGS")