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| author | Richard Sandiford <richard.sandiford@linaro.org> | 2018-01-03 21:43:44 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2018-01-03 21:43:44 +0000 |
| commit | b187677b4f275f33f181b9ca188bf0b009981cb1 (patch) | |
| tree | 5f11d157fb8fd6973bf7e30940077af925690bec /gcc/config/aarch64/predicates.md | |
| parent | c6561a1af68d6439cedde6dc79d19eda9981a4be (diff) | |
| download | gcc-b187677b4f275f33f181b9ca188bf0b009981cb1.zip gcc-b187677b4f275f33f181b9ca188bf0b009981cb1.tar.gz gcc-b187677b4f275f33f181b9ca188bf0b009981cb1.tar.bz2 | |
[AArch64] Rewrite aarch64_simd_valid_immediate
This patch reworks aarch64_simd_valid_immediate so that
it's easier to add SVE support. The main changes are:
- make simd_immediate_info easier to construct
- replace the while (1) { ... break; } blocks with checks that use
the full 64-bit value of the constant
- treat floating-point modes as integers if they aren't valid
as floating-point values
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
Remove the mode argument.
(aarch64_simd_valid_immediate): Remove the mode and inverse
arguments.
* config/aarch64/iterators.md (bitsize): New iterator.
* config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
(ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
* config/aarch64/constraints.md (Do, Db, Dn): Update calls to
aarch64_simd_valid_immediate.
* config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
(aarch64_reg_or_bic_imm): Likewise.
* config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
with an insn_type enum and msl with a modifier_type enum.
Replace element_width with a scalar_mode. Change the shift
to unsigned int. Add constructors for scalar_float_mode and
scalar_int_mode elements.
(aarch64_vect_float_const_representable_p): Delete.
(aarch64_can_const_movi_rtx_p)
(aarch64_simd_scalar_immediate_valid_for_move)
(aarch64_simd_make_constant): Update call to
aarch64_simd_valid_immediate.
(aarch64_advsimd_valid_immediate_hs): New function.
(aarch64_advsimd_valid_immediate): Likewise.
(aarch64_simd_valid_immediate): Remove mode and inverse
arguments. Rewrite to use the above. Use const_vec_duplicate_p
to detect duplicated constants and use aarch64_float_const_zero_rtx_p
and aarch64_float_const_representable_p on the result.
(aarch64_output_simd_mov_immediate): Remove mode argument.
Update call to aarch64_simd_valid_immediate and use of
simd_immediate_info.
(aarch64_output_scalar_simd_mov_immediate): Update call
accordingly.
gcc/testsuite/
* gcc.target/aarch64/vect-movi.c (movi_float_lsl24): New function.
(main): Call it.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256205
Diffstat (limited to 'gcc/config/aarch64/predicates.md')
| -rw-r--r-- | gcc/config/aarch64/predicates.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index ce7bbb1..10259c0 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -72,14 +72,14 @@ (define_predicate "aarch64_reg_or_orr_imm" (ior (match_operand 0 "register_operand") (and (match_code "const_vector") - (match_test "aarch64_simd_valid_immediate (op, mode, false, - NULL, AARCH64_CHECK_ORR)")))) + (match_test "aarch64_simd_valid_immediate (op, NULL, + AARCH64_CHECK_ORR)")))) (define_predicate "aarch64_reg_or_bic_imm" (ior (match_operand 0 "register_operand") (and (match_code "const_vector") - (match_test "aarch64_simd_valid_immediate (op, mode, false, - NULL, AARCH64_CHECK_BIC)")))) + (match_test "aarch64_simd_valid_immediate (op, NULL, + AARCH64_CHECK_BIC)")))) (define_predicate "aarch64_fp_compare_operand" (ior (match_operand 0 "register_operand") |