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| author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-12-21 06:57:04 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-12-21 06:57:04 +0000 |
| commit | a97d8b982793ba5bf1e54a41d9bb110182b8baf8 (patch) | |
| tree | 62aaefa775450b5e1cecb47fd10b0360dec12e5a /gcc/config/aarch64/predicates.md | |
| parent | 75b7462e1ac607a9107ef8a158dafdef0728f01d (diff) | |
| download | gcc-a97d8b982793ba5bf1e54a41d9bb110182b8baf8.zip gcc-a97d8b982793ba5bf1e54a41d9bb110182b8baf8.tar.gz gcc-a97d8b982793ba5bf1e54a41d9bb110182b8baf8.tar.bz2 | |
[AArch64] Tweak aarch64_classify_address interface
Previously aarch64_classify_address used an rtx code to distinguish
LDP/STP addresses from normal addresses; the code was PARALLEL
to select LDP/STP and anything else to select normal addresses.
This patch replaces that parameter with a dedicated enum.
The SVE port will add another enum value that didn't map naturally
to an rtx code.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/aarch64-protos.h (aarch64_addr_query_type): New enum.
(aarch64_legitimate_address_p): Use it instead of an rtx code,
as an optional final parameter.
* config/aarch64/aarch64.c (aarch64_classify_address): Likewise.
(aarch64_legitimate_address_p): Likewise.
(aarch64_print_address_internal): Take an aarch64_addr_query_type
instead of an rtx code.
(aarch64_address_valid_for_prefetch_p): Update calls accordingly.
(aarch64_legitimate_address_hook_p): Likewise.
(aarch64_print_ldpstp_address): Likewise.
(aarch64_print_operand_address): Likewise.
(aarch64_address_cost): Likewise.
* config/aarch64/constraints.md (Uml, Umq, Ump, Utq): Likewise.
* config/aarch64/predicates.md (aarch64_mem_pair_operand): Likewise.
(aarch64_mem_pair_lanes_operand): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255911
Diffstat (limited to 'gcc/config/aarch64/predicates.md')
| -rw-r--r-- | gcc/config/aarch64/predicates.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index 2eaf0a7..d5593d1 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -186,15 +186,15 @@ (define_predicate "aarch64_mem_pair_operand" (and (match_code "mem") - (match_test "aarch64_legitimate_address_p (mode, XEXP (op, 0), PARALLEL, - 0)"))) + (match_test "aarch64_legitimate_address_p (mode, XEXP (op, 0), false, + ADDR_QUERY_LDP_STP)"))) ;; Used for storing two 64-bit values in an AdvSIMD register using an STP ;; as a 128-bit vec_concat. (define_predicate "aarch64_mem_pair_lanes_operand" (and (match_code "mem") - (match_test "aarch64_legitimate_address_p (DFmode, XEXP (op, 0), - PARALLEL, 1)"))) + (match_test "aarch64_legitimate_address_p (DFmode, XEXP (op, 0), 1, + ADDR_QUERY_LDP_STP)"))) (define_predicate "aarch64_prefetch_operand" (match_test "aarch64_address_valid_for_prefetch_p (op, false)")) |