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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-02-22 16:35:22 +0000 |
|---|---|---|
| committer | Matthew Malcomson <matmal01@gcc.gnu.org> | 2019-02-22 16:35:22 +0000 |
| commit | 341fca1b4982c93a7c6cce90b0e0f84f92a35146 (patch) | |
| tree | 034169e57790c6f7a247df657e043b654516c585 /gcc/config/aarch64/predicates.md | |
| parent | 3c2a70cb1414b10ab3d52286087398cd03a70413 (diff) | |
| download | gcc-341fca1b4982c93a7c6cce90b0e0f84f92a35146.zip gcc-341fca1b4982c93a7c6cce90b0e0f84f92a35146.tar.gz gcc-341fca1b4982c93a7c6cce90b0e0f84f92a35146.tar.bz2 | |
Handle stack pointer with SUBS/ADDS instructions.
In general the stack pointer was not handled for many SUBS/ADDS patterns in
aarch64.md.
Both the "extended register" and "immediate" forms allow the stack pointer to be
used as the source register, while no form allows the stack pointer for the
destination register.
The define_insn patterns generating ADDS/SUBS did not allow the stack pointer
for any operand, while the define_peephole2 patterns that generated RTX to be
matched by these patterns allowed the stack pointer for any operand.
The patterns are fixed by adding the 'k' constraint for the first source operand
to all define_insns that generate the ADDS/SUBS "extended register" and
"immediate" forms (but not the "shifted register" form).
In peephole optimizations, constraint strings are ignored (see "(gccint) C
Constraint Interface" info node in the documentation), so the decision to act or
not is based solely on the predicate and condition.
This patch introduces a new predicate "aarch64_general_reg" to be used in
define_peephole2 patterns where only GENERAL_REGS registers are acceptable and
uses that predicate in the peepholes that generate patterns for ADDS/SUBS.
Full bootstrap and regtest done on aarch64-none-linux-gnu.
Regression tests done on aarch64-none-linux-gnu and aarch64-none-elf cross
compiler.
OK for trunk?
gcc/ChangeLog:
2019-02-22 Matthew Malcomson <matthew.malcomson@arm.com>
PR target/89324
* config/aarch64/aarch64.md: Use aarch64_general_reg predicate on
destination register in peepholes generating patterns for ADDS/SUBS.
(add<mode>3_compare0,
*addsi3_compare0_uxtw, add<mode>3_compareC,
add<mode>3_compareV_imm, add<mode>3_compareV,
*adds_<optab><ALLX:mode>_<GPI:mode>,
*subs_<optab><ALLX:mode>_<GPI:mode>,
*adds_<optab><ALLX:mode>_shift_<GPI:mode>,
*subs_<optab><ALLX:mode>_shift_<GPI:mode>,
*adds_<optab><mode>_multp2, *subs_<optab><mode>_multp2,
*sub<mode>3_compare0, *subsi3_compare0_uxtw,
sub<mode>3_compare1): Allow stack pointer for source register.
* config/aarch64/predicates.md (aarch64_general_reg): New predicate.
gcc/testsuite/ChangeLog:
2019-02-22 Matthew Malcomson <matthew.malcomson@arm.com>
PR target/89324
* gcc.dg/rtl/aarch64/subs_adds_sp.c: New test.
* gfortran.fortran-torture/compile/pr89324.f90: New test.
From-SVN: r269122
Diffstat (limited to 'gcc/config/aarch64/predicates.md')
| -rw-r--r-- | gcc/config/aarch64/predicates.md | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index b8e6d23..8e1b784 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -30,6 +30,10 @@ (ior (match_code "symbol_ref") (match_operand 0 "register_operand"))) +(define_predicate "aarch64_general_reg" + (and (match_operand 0 "register_operand") + (match_test "REGNO_REG_CLASS (REGNO (op)) == GENERAL_REGS"))) + ;; Return true if OP a (const_int 0) operand. (define_predicate "const0_operand" (and (match_code "const_int") |