diff options
| author | Tamar Christina <tamar.christina@arm.com> | 2016-08-02 09:25:19 +0000 |
|---|---|---|
| committer | James Greenhalgh <jgreenhalgh@gcc.gnu.org> | 2016-08-02 09:25:19 +0000 |
| commit | 1efafef383b156074d4bd5ed35f656a509c7bf7a (patch) | |
| tree | 03746c0e2e5243b1dad9f050a454caff5e255376 /gcc/config/aarch64/arm_neon.h | |
| parent | 0b953808f4395ee3e5f31a8355b200142ab30cd6 (diff) | |
| download | gcc-1efafef383b156074d4bd5ed35f656a509c7bf7a.zip gcc-1efafef383b156074d4bd5ed35f656a509c7bf7a.tar.gz gcc-1efafef383b156074d4bd5ed35f656a509c7bf7a.tar.bz2 | |
[PATCH AArch64] Add more AArch64 NEON intrinsics
Add vmaxnm_f64, vminnm_f64, vmax_f64, vmin_f64.
Committed on behalf of Tamar Christina <tamar.christina@arm.com> .
gcc/
* config/aarch64/aarch64-simd-builtins.def
(__builtin_aarch64_fmindf): Change BUILTIN_VDQF to BUILTIN_VDQF_DF.
(__builtin_aarch64_fmaxdf): Likewise.
(__builtin_aarch64_smin_nandf): Likewise.
(__builtin_aarch64_smax_nandf): Likewise.
* config/aarch64/aarch64-simd.md (<fmaxmin><mode>3): Remove.
* config/aarch64/aarch64.md (<fmaxmin><mode>3): Rename to...
(<fmaxmin><mode>3): ...this.
* config/aarch64/arm_neon.h (vmaxnm_f64): New.
(vminnm_f64): Likewise.
(vmin_f64): Likewise.
(vmax_f64): Likewise.
* config/aarch64/iterators.md (FMAXMIN): Merge with...
(FMAXMIN_UNS): ...this.
(fmaxmin): Merged with
(fmaxmin_op): ...this...
(maxmin_uns_op): ...in to this.
gcc/testsuite/
* gcc.target/aarch64/vminmaxnm.c: New.
* gcc.target/aarch64/simd/vminmaxnm_1.c (main): Added float64x1_t
tests.
From-SVN: r238977
Diffstat (limited to 'gcc/config/aarch64/arm_neon.h')
| -rw-r--r-- | gcc/config/aarch64/arm_neon.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index ab3a00c..fcdc977 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -17201,6 +17201,14 @@ vmax_f32 (float32x2_t __a, float32x2_t __b) return __builtin_aarch64_smax_nanv2sf (__a, __b); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vmax_f64 (float64x1_t __a, float64x1_t __b) +{ + return (float64x1_t) + { __builtin_aarch64_smax_nandf (vget_lane_f64 (__a, 0), + vget_lane_f64 (__b, 0)) }; +} + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) vmax_s8 (int8x8_t __a, int8x8_t __b) { @@ -17692,6 +17700,14 @@ vmaxnm_f32 (float32x2_t __a, float32x2_t __b) return __builtin_aarch64_fmaxv2sf (__a, __b); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vmaxnm_f64 (float64x1_t __a, float64x1_t __b) +{ + return (float64x1_t) + { __builtin_aarch64_fmaxdf (vget_lane_f64 (__a, 0), + vget_lane_f64 (__b, 0)) }; +} + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vmaxnmq_f32 (float32x4_t __a, float32x4_t __b) { @@ -17824,6 +17840,14 @@ vmin_f32 (float32x2_t __a, float32x2_t __b) return __builtin_aarch64_smin_nanv2sf (__a, __b); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vmin_f64 (float64x1_t __a, float64x1_t __b) +{ + return (float64x1_t) + { __builtin_aarch64_smin_nandf (vget_lane_f64 (__a, 0), + vget_lane_f64 (__b, 0)) }; +} + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) vmin_s8 (int8x8_t __a, int8x8_t __b) { @@ -17922,6 +17946,14 @@ vminnm_f32 (float32x2_t __a, float32x2_t __b) return __builtin_aarch64_fminv2sf (__a, __b); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vminnm_f64 (float64x1_t __a, float64x1_t __b) +{ + return (float64x1_t) + { __builtin_aarch64_fmind (vget_lane_f64 (__a, 0), + vget_lane_f64 (__b, 0)) }; +} + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vminnmq_f32 (float32x4_t __a, float32x4_t __b) { |