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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-08 09:23:51 +0000 |
|---|---|---|
| committer | Matthew Wahab <mwahab@gcc.gnu.org> | 2015-12-08 09:23:51 +0000 |
| commit | 5b688993056d4aefe23171f2a4760293999c8e42 (patch) | |
| tree | 11f4378e1000af17f3568432b05ef7ec47a20f2f /gcc/config/aarch64/aarch64.h | |
| parent | fb0e6f4f4e784513ef1a11c8930d6f76c97e4dc1 (diff) | |
| download | gcc-5b688993056d4aefe23171f2a4760293999c8e42.zip gcc-5b688993056d4aefe23171f2a4760293999c8e42.tar.gz gcc-5b688993056d4aefe23171f2a4760293999c8e42.tar.bz2 | |
[AArch64] Rework ARMv8.1 command line options.
* config/aarch64/aarch64-options-extensions.def: Remove
AARCH64_FL_RDMA from "fp" and "simd". Remove "pan", "lor",
"rdma".
* config/aarch64/aarch64.h (AARCH64_FL_PAN): Remove.
(AARCH64_FL_LOR): Remove.
(AARCH64_FL_RDMA): Remove.
(AARCH64_FL_V8_1): New.
(AARCH64_FL_FOR_AARCH8_1): Replace AARCH64_FL_PAN, AARCH64_FL_LOR
and AARCH64_FL_RDMA with AARCH64_FL_V8_1.
(AARCH64_ISA_RDMA): Replace AARCH64_FL_RDMA with AARCH64_FL_V8_1.
* doc/invoke.texi (AArch64 -march): Rewrite initial paragraph and
section on -march=native. Group descriptions of permitted
architecture names together. Expand description of
-march=armv8.1-a.
(AArch64 -mtune): Slightly rework section on -march=native.
(AArch64 -mcpu): Slightly rework section on -march=native.
(AArch64 Feature Modifiers): Remove "pan", "lor" and "rdma".
State that -march=armv8.1-a enables "crc" and "lse".
From-SVN: r231400
Diffstat (limited to 'gcc/config/aarch64/aarch64.h')
| -rw-r--r-- | gcc/config/aarch64/aarch64.h | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 68c006f..06345f0 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -134,9 +134,7 @@ extern unsigned aarch64_architecture_version; #define AARCH64_FL_CRC (1 << 3) /* Has CRC. */ /* ARMv8.1 architecture extensions. */ #define AARCH64_FL_LSE (1 << 4) /* Has Large System Extensions. */ -#define AARCH64_FL_PAN (1 << 5) /* Has Privileged Access Never. */ -#define AARCH64_FL_LOR (1 << 6) /* Has Limited Ordering regions. */ -#define AARCH64_FL_RDMA (1 << 7) /* Has ARMv8.1 Adv.SIMD. */ +#define AARCH64_FL_V8_1 (1 << 5) /* Has ARMv8.1 extensions. */ /* Has FP and SIMD. */ #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) @@ -147,8 +145,7 @@ extern unsigned aarch64_architecture_version; /* Architecture flags that effect instruction selection. */ #define AARCH64_FL_FOR_ARCH8 (AARCH64_FL_FPSIMD) #define AARCH64_FL_FOR_ARCH8_1 \ - (AARCH64_FL_FOR_ARCH8 | AARCH64_FL_LSE | AARCH64_FL_PAN \ - | AARCH64_FL_LOR | AARCH64_FL_RDMA) + (AARCH64_FL_FOR_ARCH8 | AARCH64_FL_LSE | AARCH64_FL_V8_1) /* Macros to test ISA flags. */ @@ -157,7 +154,7 @@ extern unsigned aarch64_architecture_version; #define AARCH64_ISA_FP (aarch64_isa_flags & AARCH64_FL_FP) #define AARCH64_ISA_SIMD (aarch64_isa_flags & AARCH64_FL_SIMD) #define AARCH64_ISA_LSE (aarch64_isa_flags & AARCH64_FL_LSE) -#define AARCH64_ISA_RDMA (aarch64_isa_flags & AARCH64_FL_RDMA) +#define AARCH64_ISA_RDMA (aarch64_isa_flags & AARCH64_FL_V8_1) /* Crypto is an optional extension to AdvSIMD. */ #define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO) |