aarch64: Tweak handling of -mgeneral-regs-only

-mgeneral-regs-only is effectively "+nofp for the compiler without
changing the assembler's ISA flags".  Currently that's implemented
by making TARGET_FLOAT, TARGET_SIMD and TARGET_SVE depend on
!TARGET_GENERAL_REGS_ONLY and then making any feature that needs FP
registers depend (directly or indirectly) on one of those three TARGET
macros.  The problem is that it's easy to forgot to do the last bit.

This patch instead represents the distinction between "assemnbler
ISA flags" and "compiler ISA flags" more directly, funnelling
all updates through a new function that sets both sets of flags
together.

gcc/
	* config/aarch64/aarch64.opt (aarch64_asm_isa_flags): New variable.
	* config/aarch64/aarch64.h (aarch64_asm_isa_flags)
	(aarch64_isa_flags): Redefine as read-only macros.
	(TARGET_SIMD, TARGET_FLOAT, TARGET_SVE): Don't depend on
	!TARGET_GENERAL_REGS_ONLY.
	* common/config/aarch64/aarch64-common.cc
	(aarch64_set_asm_isa_flags): New function.
	(aarch64_handle_option): Call it when updating -mgeneral-regs.
	* config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Replace
	m_old_isa_flags with m_old_asm_isa_flags.
	(aarch64_set_asm_isa_flags): Declare.
	* config/aarch64/aarch64-builtins.cc
	(aarch64_simd_switcher::aarch64_simd_switcher)
	(aarch64_simd_switcher::~aarch64_simd_switcher): Save and restore
	aarch64_asm_isa_flags instead of aarch64_isa_flags.
	* config/aarch64/aarch64-sve-builtins.cc
	(check_required_extensions): Use aarch64_asm_isa_flags instead
	of aarch64_isa_flags.
	* config/aarch64/aarch64.cc (aarch64_set_asm_isa_flags): New function.
	(aarch64_override_options, aarch64_handle_attr_arch)
	(aarch64_handle_attr_cpu, aarch64_handle_attr_isa_flags): Use
	aarch64_set_asm_isa_flags to set the ISA flags.
	(aarch64_option_print, aarch64_declare_function_name)
	(aarch64_start_file): Use aarch64_asm_isa_flags instead
	of aarch64_isa_flags.
	(aarch64_can_inline_p): Check aarch64_asm_isa_flags as well as
	aarch64_isa_flags.

1 files changed, 14 insertions, 3 deletions

diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 97da721..6ee6357 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -22,6 +22,17 @@
 #ifndef GCC_AARCH64_H
 #define GCC_AARCH64_H
 
+/* Make these flags read-only so that all uses go via
+   aarch64_set_asm_isa_flags.  */
+#ifndef GENERATOR_FILE
+#undef aarch64_asm_isa_flags
+#define aarch64_asm_isa_flags \
+  ((aarch64_feature_flags) global_options.x_aarch64_asm_isa_flags)
+#undef aarch64_isa_flags
+#define aarch64_isa_flags \
+  ((aarch64_feature_flags) global_options.x_aarch64_isa_flags)
+#endif
+
 /* Target CPU builtins.  */
 #define TARGET_CPU_CPP_BUILTINS()	\
   aarch64_cpu_cpp_builtins (pfile)
@@ -51,8 +62,8 @@
 
 /* AdvSIMD is supported in the default configuration, unless disabled by
    -mgeneral-regs-only or by the +nosimd extension.  */
-#define TARGET_SIMD (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_SIMD)
-#define TARGET_FLOAT (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_FP)
+#define TARGET_SIMD (AARCH64_ISA_SIMD)
+#define TARGET_FLOAT (AARCH64_ISA_FP)
 
 #define UNITS_PER_WORD		8
 
@@ -242,7 +253,7 @@ enum class aarch64_feature : unsigned char {
 #define TARGET_DOTPROD (TARGET_SIMD && AARCH64_ISA_DOTPROD)
 
 /* SVE instructions, enabled through +sve.  */
-#define TARGET_SVE (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_SVE)
+#define TARGET_SVE (AARCH64_ISA_SVE)
 
 /* SVE2 instructions, enabled through +sve2.  */
 #define TARGET_SVE2 (TARGET_SVE && AARCH64_ISA_SVE2)