varasm.c (assemble_real): Use REAL_VALUE_TO_x and assemble_integer to emit floating point values.

	* varasm.c (assemble_real): Use REAL_VALUE_TO_x and assemble_integer
	to emit floating point values.
	(assemble_real_1): Remove.

	* 1750a/1750a.c (real_value_to_target_single): New.
	(real_value_to_target_double): New.
	* 1750a/1750a.h (TARGET_FLOAT_FORMAT): New.
	(REAL_VALUE_TO_TARGET_SINGLE): New.
	(REAL_VALUE_TO_TARGET_DOUBLE): New.
	* 1750a/1750a-protos.h: Update.

	* 1750a/1750a.h, a29k/a29k.h, alpha/alpha.h, alpha/unicosmk.h,
	alpha/vms.h, arc/arc.h, arm/aof.h, arm/aout.h, avr/avr.c,
	avr/avr.h, c4x/c4x.h, clipper/clix.h, convex/convex.h, cris/cris.h,
	d30v/d30v.h, dsp16xx/dsp16xx.c, dsp16xx/dsp16xx.h, elxsi/elxsi.h,
	fr30/fr30.h, h8300/h8300.h, i370/i370.h, i386/i386.h, i386/i386elf.h,
	i386/next.h, i386/ptx4-i.h, i386/sysv4.h, i860/fx2800.h, i860/i860.h,
	i860/paragon.h, i860/sysv4.h, i960/i960-protos.h, i960/i960.c,
	i960/i960.h, ia64/ia64.h, m32r/m32r.h, m68hc11/m68hc11.c,
	m68hc11/m68hc11.h, m68k/3b1.h, m68k/altos3068.h, m68k/crds.h,
	m68k/dpx2.h, m68k/hp320.h, m68k/m68k.h, m68k/mot3300.h, m68k/news.h,
	m68k/next.h, m68k/next21.h, m68k/sgs.h, m68k/sun2o4.h, m68k/sun3.h,
	m68k/tower-as.h, m88k/m88k.h, mcore/mcore.h, mips/mips-protos.h,
	mips/mips.c, mips/mips.h, mmix/mmix-protos.h, mmix/mmix.c,
	mmix/mmix.h, mn10200/mn10200.h, mn10300/mn10300.h, ns32k/encore.h,
	ns32k/ns32k.h, pa/long_double.h, pa/pa.h, pdp11/pdp11.h, pj/pj.h,
	romp/romp.c, romp/romp.h, rs6000/rs6000.h, s390/linux.h, sh/sh.h,
	sparc/sparc.h, stormy16/stormy16.h, v850/v850.h, vax/vax.h,
	vax/vaxv.h, we32k/we32k.h, doc/tm.texi: Remove ASM_OUTPUT_FLOAT,
	ASM_OUTPUT_DOUBLE, ASM_OUTPUT_LONG_DOUBLE, ASM_OUTPUT_BYTE_FLOAT,
	ASM_OUTPUT_SHORT_FLOAT, ASM_OUTPUT_THREE_QUARTER_FLOAT, and all
	associated support routines.

From-SVN: r48207

1 files changed, 141 insertions, 0 deletions

diff --git a/gcc/config/1750a/1750a.c b/gcc/config/1750a/1750a.c
index 54a2216..099f7c7 100644
--- a/gcc/config/1750a/1750a.c
+++ b/gcc/config/1750a/1750a.c
@@ -870,4 +870,145 @@ which_bit (x)
   return b;
 }
 
+
+/* Convert a REAL_VALUE_TYPE to the target float format:
+
+        MSB                             LSB MSB            LSB
+        ------------------------------------------------------
+        |S|                 Mantissa       |  Exponent       |
+        ------------------------------------------------------
+         0 1                             23 24             31
+
+*/
+
+long
+real_value_to_target_single(in)
+     REAL_VALUE_TYPE in;
+{
+  union {
+    double d;
+    struct {
+#if HOST_WORDS_BIG_ENDIAN
+        unsigned int negative:1;
+        unsigned int exponent:11;
+        unsigned int mantissa0:20;
+        unsigned int mantissa1:32;
+#else
+        unsigned int mantissa1:32;
+        unsigned int mantissa0:20;
+        unsigned int exponent:11;
+        unsigned int negative:1;
+#endif
+    } s;
+  } ieee;
+
+  unsigned int mant;
+  int exp;
+
+  if (HOST_FLOAT_FORMAT != IEEE_FLOAT_FORMAT)
+    abort ();
+
+  ieee.d = in;
+
+  /* Don't bother with NaN, Inf, 0 special cases, since they'll be handled
+     by the over/underflow code below.  */
+  exp = ieee.s.exponent - 0x3ff;
+  mant = 1 << 23 | ieee.s.mantissa0 << 3 | ieee.s.mantissa1 >> 29;
+
+  /* The sign is actually part of the mantessa.  Since we're comming from
+     IEEE we know that either bit 23 is set or we have a zero.  */
+  if (! ieee.s.negative)
+    {
+      mant >>= 1;
+      exp += 1;
+    }
+
+  /* Check for overflow.  Crop to FLT_MAX.  */
+  if (exp > 127)
+    {
+      exp = 127;
+      mant = (ieee.s.negative ? 0xffffff : 0x7fffff);
+    }
+  /* Underflow to zero.  */
+  else if (exp < -128)
+    {
+      exp = 0;
+      mant = 0;
+    }
+
+  return mant << 8 | (exp & 0xff);
+}
 
+/* Convert a REAL_VALUE_TYPE to the target 1750a extended float format:
+
+        ----------------------------------------------------
+        | |      Mantissa       |        |   Mantissa      |
+        |S|         MS          |Exponent|      LS         |
+        ----------------------------------------------------
+         0 1                  23 24    31 32             47
+
+*/
+
+void
+real_value_to_target_double(in, out)
+     REAL_VALUE_TYPE in;
+     long out[];
+{
+  union {
+    double d;
+    struct {
+#if HOST_WORDS_BIG_ENDIAN
+        unsigned int negative:1;
+        unsigned int exponent:11;
+        unsigned int mantissa0:20;
+        unsigned int mantissa1:32;
+#else
+        unsigned int mantissa1:32;
+        unsigned int mantissa0:20;
+        unsigned int exponent:11;
+        unsigned int negative:1;
+#endif
+    } s;
+  } ieee;
+
+  unsigned int mant_h24, mant_l16;
+  int exp;
+
+  if (HOST_FLOAT_FORMAT != IEEE_FLOAT_FORMAT)
+    abort ();
+
+  ieee.d = in;
+
+  /* Don't bother with NaN, Inf, 0 special cases, since they'll be handled
+     by the over/underflow code below.  */
+  exp = ieee.s.exponent - 0x3ff;
+  mant_h24 = 1 << 23 | ieee.s.mantissa0 << 3 | ieee.s.mantissa1 >> 29;
+  mant_l16 = (ieee.s.mantissa1 >> 13) & 0xffff;
+
+  /* The sign is actually part of the mantessa.  Since we're comming from
+     IEEE we know that either bit 23 is set or we have a zero.  */
+  if (! ieee.s.negative)
+    {
+      mant_l16 = mant_l16 >> 1 | (mant_h24 & 1) << 15;
+      mant_h24 >>= 1;
+      exp += 1;
+    }
+
+  /* Check for overflow.  Crop to DBL_MAX.  */
+  if (exp > 127)
+    {
+      exp = 127;
+      mant_h24 = (ieee.s.negative ? 0xffffff : 0x7fffff);
+      mant_l16 = 0xffff;
+    }
+  /* Underflow to zero.  */
+  else if (exp < -128)
+    {
+      exp = 0;
+      mant_h24 = 0;
+      mant_l16 = 0;
+    }
+
+  out[0] = mant_h24 << 8 | (exp & 0xff);
+  out[1] = mant_l16;
+}