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authorRobin Dapp <rdapp@ventanamicro.com>2024-11-21 14:49:53 +0100
committerRobin Dapp <rdapp@ventanamicro.com>2024-11-25 16:01:48 +0100
commitb82a5810e7bcc82b933e16f9067879b9d22b85c7 (patch)
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parent2e6b3308af6ddf87925321ddd2d387bfd352e410 (diff)
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RISC-V: Ensure vtype for full-register moves [PR117544].
As discussed in PR117544 the VTYPE register is not preserved across function calls. Even though vmv1r-like instructions operate independently of the actual vtype they still require a valid vtype. As we cannot guarantee that the vtype is valid we must make sure to emit a vsetvl between a function call and a vmv1r.v. This patch makes the necessary changes by splitting the full-reg-move insns into patterns that use the vtype register and adding vmov to the types of instructions requiring a vset. PR target/117544 gcc/ChangeLog: * config/riscv/vector.md (*mov<mode>_whole): Split. (*mov<mode>_fract): Ditto. (*mov<mode>): Ditto. (*mov<mode>_vls): Ditto. (*mov<mode>_reg_whole_vtype): New pattern with vtype use. (*mov<mode>_fract_vtype): Ditto. (*mov<mode>_vtype): Ditto. (*mov<mode>_vls_vtype): Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/abi-call-args-4.c: Expect vsetvl. * gcc.target/riscv/rvv/base/pr117544.c: New test.
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