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authorJames Greenhalgh <james.greenhalgh@arm.com>2017-12-12 11:27:54 +0000
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>2017-12-12 11:27:54 +0000
commitc5060cadf030f6517a1552bf0fc263cb03eb96c4 (patch)
tree1ef03d795f5e00306bb2200aa40cf082fc59bb06 /gcc/combine.c
parent49e6a6c023d1b91c90d3fbdf16adf20dff246156 (diff)
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[Patch combine] Don't create vector mode ZERO_EXTEND from subregs
The code in simplify set to handle transforming the paradoxical subreg expression: (set FOO (subreg:M (mem:N BAR) 0)) in to: (set FOO (zero_extend:M (mem:N BAR))) Does not consider the case where M is a vector mode, allowing it to construct (for example): (zero_extend:V4SI (mem:SI)) For one, this has the wrong semantics - but fortunately we fail long before then in expand_compound_operation. We need to explicitly reject vector modes from this transformation. gcc/ * combine.c (simplify_set): Do not transform subregs to zero_extends if the destination mode is a vector mode. From-SVN: r255578
Diffstat (limited to 'gcc/combine.c')
-rw-r--r--gcc/combine.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/gcc/combine.c b/gcc/combine.c
index f4e9445..b6410c3 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -6962,11 +6962,13 @@ simplify_set (rtx x)
/* If we have (set FOO (subreg:M (mem:N BAR) 0)) with M wider than N, this
would require a paradoxical subreg. Replace the subreg with a
- zero_extend to avoid the reload that would otherwise be required. */
+ zero_extend to avoid the reload that would otherwise be required.
+ Don't do this for vector modes, as the transformation is incorrect. */
enum rtx_code extend_op;
if (paradoxical_subreg_p (src)
&& MEM_P (SUBREG_REG (src))
+ && !VECTOR_MODE_P (GET_MODE (src))
&& (extend_op = load_extend_op (GET_MODE (SUBREG_REG (src)))) != UNKNOWN)
{
SUBST (SET_SRC (x),