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author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-04-25 14:52:37 +0100 |
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committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-04-25 14:54:57 +0100 |
commit | 9e9503e7b2c1517e8c46ea4d2e8805cc20301f34 (patch) | |
tree | 6260096d8909e805907aff0b7e918a1861ff25bd /gcc/c | |
parent | c69db3ef7f7d82a50f46038aa5457b7c8cc2d643 (diff) | |
download | gcc-9e9503e7b2c1517e8c46ea4d2e8805cc20301f34.zip gcc-9e9503e7b2c1517e8c46ea4d2e8805cc20301f34.tar.gz gcc-9e9503e7b2c1517e8c46ea4d2e8805cc20301f34.tar.bz2 |
aarch64: PR target/PR99195 Annotate more simple integer binary patterns with vcz subst rules
This patch adds more straightforward annotations to some more integer binary ops to
eliminate redundant fmovs around 64-bit SIMD results.
Bootstrapped and tested on aarch64-none-linux.
gcc/ChangeLog:
PR target/99195
* config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
(orn<mode>3<vczle><vczbe>): ... This.
(bic<mode>3): Rename to...
(bic<mode>3<vczle><vczbe>): ... This.
(<su><maxmin><mode>3): Rename to...
(<su><maxmin><mode>3<vczle><vczbe>): ... This.
gcc/testsuite/ChangeLog:
PR target/99195
* gcc.target/aarch64/simd/pr99195_1.c: Add tests for orn, bic, max and min.
Diffstat (limited to 'gcc/c')
0 files changed, 0 insertions, 0 deletions