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| author | Tamar Christina <tamar.christina@arm.com> | 2019-02-11 16:54:18 +0000 |
|---|---|---|
| committer | Tamar Christina <tnfchris@gcc.gnu.org> | 2019-02-11 16:54:18 +0000 |
| commit | e43a01394ca5146824a6a896328b3999c4faf927 (patch) | |
| tree | 250e8cc095a48cd7024fc6e54fb6fc3d87f4d940 /gcc/builtins.h | |
| parent | 09e0c98bc4d9b5a9d0b03d9aee14c2f3fb8135c5 (diff) | |
| download | gcc-e43a01394ca5146824a6a896328b3999c4faf927.zip gcc-e43a01394ca5146824a6a896328b3999c4faf927.tar.gz gcc-e43a01394ca5146824a6a896328b3999c4faf927.tar.bz2 | |
Arm: Update tests after register allocation changes. (PR/target 88560)
After the register allocator changes of r268705 we need to update a few tests
with new output.
In all cases the compiler is now generating the expected code, since the tests
are all float16 testcases using a hard-floar abi, we expect that actual fp16
instructions are used rather than using integer loads and stores. Because of
we also save on some mov.f16s that were being emitted before to move between
the two.
The aapcs cases now match the f32 cases in using floating point operations.
gcc/testsuite/Changelog
PR middle-end/88560
* gcc.target/arm/armv8_2-fp16-move-1.c: Update assembler scans.
* gcc.target/arm/fp16-aapcs-1.c: Likewise.
* gcc.target/arm/fp16-aapcs-3.c: Likewise.
From-SVN: r268772
Diffstat (limited to 'gcc/builtins.h')
0 files changed, 0 insertions, 0 deletions