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| author | Andrew Stubbs <ams@codesourcery.com> | 2020-07-31 11:27:24 +0100 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2020-08-04 15:45:22 +0100 |
| commit | 19fad46721af338b24aff48127ae654673bffa7b (patch) | |
| tree | eb86e68fa4014f08e0a04d800877d3898a9e6b25 /gcc/brig | |
| parent | 843710c037c1396dcdbc23e5b6b456b8ae6e2b8b (diff) | |
| download | gcc-19fad46721af338b24aff48127ae654673bffa7b.zip gcc-19fad46721af338b24aff48127ae654673bffa7b.tar.gz gcc-19fad46721af338b24aff48127ae654673bffa7b.tar.bz2 | |
amdgcn: TImode shifts
Implement TImode shifts in the backend.
The middle-end support that does it for other architectures doesn't work for
GCN because BITS_PER_WORD==32, meaning that TImode is quad-word, not
double-word.
gcc/ChangeLog:
* config/gcn/gcn.md ("<expander>ti3"): New.
Diffstat (limited to 'gcc/brig')
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