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| author | Jiahao Xu <xujiahao@loongson.cn> | 2024-12-17 10:41:48 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2024-12-25 17:35:09 +0800 |
| commit | 44e61bd7124c762e81d8c6e615fbe7c88f773637 (patch) | |
| tree | 8b7e989f935c7205ea43bb73180af0d71b9ec687 /gcc/ada/gcc-interface/system.ads | |
| parent | c6b7d0343f2c0eb3102341c9326fe314a047bee6 (diff) | |
| download | gcc-44e61bd7124c762e81d8c6e615fbe7c88f773637.zip gcc-44e61bd7124c762e81d8c6e615fbe7c88f773637.tar.gz gcc-44e61bd7124c762e81d8c6e615fbe7c88f773637.tar.bz2 | |
LoongArch: Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS hook
The hook changes the allocno class to either FP_REGS or GR_REGS depending on
the mode of the register. This results in better register allocation overall,
fewer spills and reduced codesize - particularly in SPEC2017 lbm.
gcc/ChangeLog:
* config/loongarch/loongarch.cc
(loongarch_ira_change_pseudo_allocno_class): New function.
(TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Define macro.
Diffstat (limited to 'gcc/ada/gcc-interface/system.ads')
0 files changed, 0 insertions, 0 deletions