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| author | Uros Bizjak <ubizjak@gmail.com> | 2018-05-23 17:13:31 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2018-05-23 17:13:31 +0200 |
| commit | 4b3f49649a76afc3ed1b75c7e68d641377e22ae1 (patch) | |
| tree | 18246a1811de5a29d2a0ebdca6b8d7d55dc2c730 /gcc/ChangeLog | |
| parent | 3f13154553f8546ac3b2154440bca0cf556d57a7 (diff) | |
| download | gcc-4b3f49649a76afc3ed1b75c7e68d641377e22ae1.zip gcc-4b3f49649a76afc3ed1b75c7e68d641377e22ae1.tar.gz gcc-4b3f49649a76afc3ed1b75c7e68d641377e22ae1.tar.bz2 | |
i386.md (*floatuns<SWI48:mode><MODEF:mode>2_avx512): New insn pattern.
* config/i386/i386.md (*floatuns<SWI48:mode><MODEF:mode>2_avx512):
New insn pattern.
(floatunssi<mode>2): Also enable for AVX512F and TARGET_SSE_MATH.
Rewrite expander pattern. Emit gen_floatunssi<mode>2_i387_with_xmm
for non-SSE modes.
(floatunsdisf2): Rewrite expander pattern. Hanlde TARGET_AVX512F.
(floatunsdidf2): Ditto.
* config/i386/i386.md (fixuns_trunc<mode>di2): New insn pattern.
(fixuns_trunc<mode>si2_avx512f): Ditto.
(*fixuns_trunc<mode>si2_avx512f_zext): Ditto.
(fixuns_trunc<mode>si2): Also enable for AVX512F and TARGET_SSE_MATH.
Emit fixuns_trunc<mode>si2_avx512f for AVX512F targets.
testsuite/ChangeLog:
* gcc.target/i386/cvt-2.c: New test.
* gcc.target/i386/cvt-3.c: New test.
From-SVN: r260614
Diffstat (limited to 'gcc/ChangeLog')
| -rw-r--r-- | gcc/ChangeLog | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 270c979..e9268d6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,21 @@ +2018-05-23 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*floatuns<SWI48:mode><MODEF:mode>2_avx512): + New insn pattern. + (floatunssi<mode>2): Also enable for AVX512F and TARGET_SSE_MATH. + Rewrite expander pattern. Emit gen_floatunssi<mode>2_i387_with_xmm + for non-SSE modes. + (floatunsdisf2): Rewrite expander pattern. Hanlde TARGET_AVX512F. + (floatunsdidf2): Ditto. + +2018-05-23 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (fixuns_trunc<mode>di2): New insn pattern. + (fixuns_trunc<mode>si2_avx512f): Ditto. + (*fixuns_trunc<mode>si2_avx512f_zext): Ditto. + (fixuns_trunc<mode>si2): Also enable for AVX512F and TARGET_SSE_MATH. + Emit fixuns_trunc<mode>si2_avx512f for AVX512F targets. + 2018-05-23 Alexander Monakov <amonakov@ispras.ru> PR rtl-optimization/79985 |