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authorJakub Jelinek <jakub@redhat.com>2021-11-02 09:44:24 +0100
committerJakub Jelinek <jakub@redhat.com>2021-11-02 09:44:24 +0100
commite178d02d390c8f972aea45c1fe5464451d818128 (patch)
tree8f778ddcfcfa9050857a908c671cb881cc74e97a /contrib
parentf81970b5f386630b98a33373c23dcc9234c6a980 (diff)
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ia32: Disallow mode(V1TI) [PR103020]
As discussed in the PR, TImode isn't supported for -m32 on x86 (for the same reason as on most 32-bit targets, no support for > 2 * BITS_PER_WORD precision integers), but since PR32280 V1TImode is allowed with -msse in SSE regs, V2TImode with -mavx or V4TImode with -mavx512f. typedef __int128 V __attribute__((vector_size ({16,32,64})); will not work, neither typedef int I __attribute__((mode(TI))); but mode(V1TI), mode(V2TI) etc. are accepted with a warning when those ISAs are enabled. But they are certainly not fully supported, for some optabs maybe, but most of them will not. And, veclower lowering those ops to TImode scalar operations will not work either because TImode isn't supported. So, this patch keeps V1TImode etc. in VALID*_MODE macros so that we can use it in certain instructions, but disallows it in targetm.vector_mode_supported_p, so that we don't offer those modes to the user as supported. 2021-11-02 Jakub Jelinek <jakub@redhat.com> PR target/103020 * config/i386/i386.c (ix86_vector_mode_supported_p): Reject vector modes with TImode inner mode if 32-bit. * gcc.target/i386/pr103020.c: New test.
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