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authorFei Gao <gaofei@eswincomputing.com>2023-08-29 08:37:44 +0000
committerKito Cheng <kito.cheng@sifive.com>2023-08-30 18:01:04 +0800
commit3d1d3132b9d4dc8b6069ad95dad624371124f297 (patch)
tree354f02692bdb1347a536a0759fc977cc5f060568 /contrib/unused_functions.py
parent398842e7038ea0f34054f0f694014d0ecd656846 (diff)
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RISC-V: support cm.push cm.pop cm.popret in zcmp
Zcmp can share the same logic as save-restore in stack allocation: pre-allocation by cm.push, step 1 and step 2. Pre-allocation not only saves callee saved GPRs, but also saves callee saved FPRs and local variables if any. Please be noted cm.push pushes ra, s0-s11 in reverse order than what save-restore does. So adaption has been done in .cfi directives in my patch. gcc/ChangeLog: * config/riscv/iterators.md (slot0_offset): slot 0 offset in stack GPRs area in bytes (slot1_offset): slot 1 offset in stack GPRs area in bytes (slot2_offset): likewise (slot3_offset): likewise (slot4_offset): likewise (slot5_offset): likewise (slot6_offset): likewise (slot7_offset): likewise (slot8_offset): likewise (slot9_offset): likewise (slot10_offset): likewise (slot11_offset): likewise (slot12_offset): likewise * config/riscv/predicates.md (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0 (stack_push_up_to_s1_operand): likewise (stack_push_up_to_s2_operand): likewise (stack_push_up_to_s3_operand): likewise (stack_push_up_to_s4_operand): likewise (stack_push_up_to_s5_operand): likewise (stack_push_up_to_s6_operand): likewise (stack_push_up_to_s7_operand): likewise (stack_push_up_to_s8_operand): likewise (stack_push_up_to_s9_operand): likewise (stack_push_up_to_s11_operand): likewise (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0 (stack_pop_up_to_s1_operand): likewise (stack_pop_up_to_s2_operand): likewise (stack_pop_up_to_s3_operand): likewise (stack_pop_up_to_s4_operand): likewise (stack_pop_up_to_s5_operand): likewise (stack_pop_up_to_s6_operand): likewise (stack_pop_up_to_s7_operand): likewise (stack_pop_up_to_s8_operand): likewise (stack_pop_up_to_s9_operand): likewise (stack_pop_up_to_s11_operand): likewise * config/riscv/riscv-protos.h (riscv_zcmp_valid_stack_adj_bytes_p):declaration * config/riscv/riscv.cc (struct riscv_frame_info): comment change (riscv_avoid_multi_push): helper function of riscv_use_multi_push (riscv_use_multi_push): true if multi push is used (riscv_multi_push_sregs_count): num of sregs in multi-push (riscv_multi_push_regs_count): num of regs in multi-push (riscv_16bytes_align): align to 16 bytes (riscv_stack_align): moved to a better place (riscv_save_libcall_count): no functional change (riscv_compute_frame_info): add zcmp frame info (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push (riscv_gen_multi_push_pop_insn): gen function for multi push and pop (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push (riscv_expand_prologue): allocate stack by cm.push (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret] (riscv_expand_epilogue): allocate stack by cm.pop[ret] (zcmp_base_adj): calculate stack adjustment base size (zcmp_additional_adj): calculate stack adjustment additional size (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra (S0_MASK): likewise (S1_MASK): likewise (S2_MASK): likewise (S3_MASK): likewise (S4_MASK): likewise (S5_MASK): likewise (S6_MASK): likewise (S7_MASK): likewise (S8_MASK): likewise (S9_MASK): likewise (S10_MASK): likewise (S11_MASK): likewise (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most (ZCMP_MAX_SPIMM): max spimm value (ZCMP_SP_INC_STEP): zcmp sp increment step (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11) * config/riscv/riscv.md: include zc.md * config/riscv/zc.md: New file. machine description for zcmp gcc/testsuite/ChangeLog: * gcc.target/riscv/rv32e_zcmp.c: New test. * gcc.target/riscv/rv32i_zcmp.c: New test. * gcc.target/riscv/zcmp_push_fpr.c: New test. * gcc.target/riscv/zcmp_stack_alignment.c: New test.
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