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authorRoger Sayle <roger@nextmovesoftware.com>2021-12-12 18:03:03 +0100
committerTom de Vries <tdevries@suse.de>2021-12-15 14:58:40 +0100
commit308d688bebdd1f29cb82c7d0e09b43e57c581659 (patch)
tree868747cb6f838101e6836d1d2fe1ab4709dde51c /contrib/reghunt
parenteede2498e61e00a176fb2908ca0317b55c084a84 (diff)
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nvptx: Add -misa=sm_75 and -misa=sm_80
Add new target macros TARGET_SM75 and TARGET_SM80. Add support for __builtin_tanhf, HFmode exp2/tanh and also for HFmode min/max, controlled by TARGET_SM75 and TARGET_SM80 respectively. The following has been tested on nvptx-none, hosted on x86_64-pc-linux-gnu with a "make" and "make -k check" with no new failures. gcc/ChangeLog: * config/nvptx/nvptx-opts.h (ptx_isa): PTX_ISA_SM75 and PTX_ISA_SM80 ISA levels. * config/nvptx/nvptx.opt: Add sm_75 and sm_80 to -misa. * config/nvptx/nvptx.h (TARGET_SM75, TARGET_SM80): New helper macros to conditionalize functionality on target ISA. * config/nvptx/nvptx-c.c (nvptx_cpu_cpp_builtins): Add __PTX_SM__ support for the new ISA levels. * config/nvptx/nvptx.c (nvptx_file_start): Add support for TARGET_SM75 and TARGET_SM80. * config/nvptx/nvptx.md (define_c_enum "unspec"): New UNSPEC_TANH. (define_mode_iterator HSFM): New iterator for HFmode and SFmode. (exp2hf2): New define_insn controlled by TARGET_SM75. (tanh<mode>2): New define_insn controlled by TARGET_SM75. (sminhf3, smaxhf3): New define_isnns controlled by TARGET_SM80. gcc/testsuite/ChangeLog: * gcc.target/nvptx/float16-2.c: New test case. * gcc.target/nvptx/tanh-1.c: New test case.
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