RISC-V: Support RVVDImode for avg3_ceil auto vectHEADtrunkmaster

Like the avg3_floor pattern, the avg3_ceil has the
similar issue that lack of the RVV DImode support.

Thus, this patch would like to support the DImode by
the standard name, with the iterator V_VLSI_D.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

gcc/ChangeLog:

	* config/riscv/autovec.md (avg<mode>3_ceil): Add new pattern
	of avg3_ceil for RVV DImode

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/avg_data.h: Adjust the test data.
	* gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: New test.
	* gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i64-from-i128.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

0 files changed, 0 insertions, 0 deletions