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author | Raphael Moreira Zinsly <rzinsly@ventanamicro.com> | 2024-09-05 21:50:54 -0600 |
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committer | Jeff Law <jlaw@ventanamicro.com> | 2024-09-05 21:50:54 -0600 |
commit | ecdb9f59d0915f154a4c8fa56e11d81479f535eb (patch) | |
tree | 7ffb050f6d92c2d6d11391b4fda907d18209354a /ChangeLog | |
parent | a2e28b105cea4c44c3903d8d979c7a4afa1193f0 (diff) | |
download | gcc-ecdb9f59d0915f154a4c8fa56e11d81479f535eb.zip gcc-ecdb9f59d0915f154a4c8fa56e11d81479f535eb.tar.gz gcc-ecdb9f59d0915f154a4c8fa56e11d81479f535eb.tar.bz2 |
[PATCH 1/2 v2] RISC-V: Additional large constant synthesis improvements
Changes since v1:
- Fix bit31.
- Remove negative shift checks.
- Fix synthesis-7.c expected output.
-- >8 --
Improve handling of large constants in riscv_build_integer, generate
better code for constants where the high half can be constructed
by shifting/shiftNadding the low half or if the halves differ by less
than 2k.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_build_integer): Detect new case
of constants that can be improved.
(riscv_move_integer): Add synthesys for concatening constants
without Zbkb.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/synthesis-7.c: Adjust expected output.
* gcc.target/riscv/synthesis-12.c: New test.
* gcc.target/riscv/synthesis-13.c: New test.
* gcc.target/riscv/synthesis-14.c: New test.
Diffstat (limited to 'ChangeLog')
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