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authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>2023-02-10 05:45:44 +0800
committerKito Cheng <kito.cheng@sifive.com>2023-02-12 15:26:24 +0800
commit6271a07219a7d764ef59607836c01e0084c3d50c (patch)
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parent30eedd6a4fccbd3202490ad2dd483bfd1b48201e (diff)
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RISC-V: Add vnsrl/vnsra/vncvt/vmerge/vmv C/C++ support
gcc/ChangeLog: * config/riscv/constraints.md (Wbr): Remove unused constraint. * config/riscv/predicates.md: Fix move operand predicate. * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class. (class vncvt_x): Ditto. (class vmerge): Ditto. (class vmv_v): Ditto. (BASE): Ditto. * config/riscv/riscv-vector-builtins-bases.h: Ditto. * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto. (vsrl): Ditto. (vnsrl): Ditto. (vnsra): Ditto. (vncvt_x): Ditto. (vmerge): Ditto. (vmv_v): Ditto. * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto. (struct move_def): Ditto. (SHAPE): Ditto. * config/riscv/riscv-vector-builtins-shapes.h: Ditto. * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable. (DEF_RVV_WEXTU_OPS): Ditto * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix. (v_v): Ditto. (v_x): Ditto. (x_w): Ditto. (x): Ditto. * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule. * config/riscv/vector-iterators.md (nmsac):New iterator. (nmsub): New iterator. * config/riscv/vector.md (@pred_merge<mode>): New pattern. (@pred_merge<mode>_scalar): New pattern. (*pred_merge<mode>_scalar): New pattern. (*pred_merge<mode>_extended_scalar): New pattern. (@pred_narrow_<optab><mode>): New pattern. (@pred_narrow_<optab><mode>_scalar): New pattern. (@pred_trunc<mode>): New pattern.
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