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| author | Christophe Lyon <christophe.lyon@st.com> | 2019-09-10 10:09:27 +0200 |
|---|---|---|
| committer | Christophe Lyon <clyon@gcc.gnu.org> | 2019-09-10 10:09:27 +0200 |
| commit | fec08d85b0f38c46ef72606fb04ed05bc4821ffa (patch) | |
| tree | 5180900fd9bbb3d45d0ac78cd5d27b2e39066d9b | |
| parent | 1ce7625c439d111b412c069e7918babf4e776310 (diff) | |
| download | gcc-fec08d85b0f38c46ef72606fb04ed05bc4821ffa.zip gcc-fec08d85b0f38c46ef72606fb04ed05bc4821ffa.tar.gz gcc-fec08d85b0f38c46ef72606fb04ed05bc4821ffa.tar.bz2 | |
[ARM/FDPIC v6 21/24] [ARM] FDPIC: Handle stack-protector combined patterns
The recent stack_protect_combined_set_insn and
stack_protect_combined_test_insn force recomputing of GOT base, but
need to take into account that in FDPIC mode, the PIC register is
fixed by the ABI (r9).
2019-09-10 Christophe Lyon <christophe.lyon@st.com>
gcc/
* config/arm/arm.md (stack_protect_combined_set_insn): Handle
FDPIC mode.
(stack_protect_combined_test_insn): Likewise.
From-SVN: r275582
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 18 |
2 files changed, 22 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index afe73b5..3bf2a0b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,10 @@ 2019-09-10 Christophe Lyon <christophe.lyon@st.com> + + * config/arm/arm.md (stack_protect_combined_set_insn): Handle + FDPIC mode. + (stack_protect_combined_test_insn): Likewise. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> Mickaël Guêné <mickael.guene@st.com> * config/arm/arm.c (arm_load_tp): Add FDPIC support. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 918271d..6513c2d 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -8270,8 +8270,15 @@ { if (flag_pic) { + rtx pic_reg; + + if (TARGET_FDPIC) + pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + else + pic_reg = operands[3]; + /* Forces recomputing of GOT base now. */ - legitimize_pic_address (operands[1], SImode, operands[2], operands[3], + legitimize_pic_address (operands[1], SImode, operands[2], pic_reg, true /*compute_now*/); } else @@ -8346,8 +8353,15 @@ if (flag_pic) { + rtx pic_reg; + + if (TARGET_FDPIC) + pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + else + pic_reg = operands[4]; + /* Forces recomputing of GOT base now. */ - legitimize_pic_address (operands[1], SImode, operands[3], operands[4], + legitimize_pic_address (operands[1], SImode, operands[3], pic_reg, true /*compute_now*/); } else |