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| author | H.J. Lu <hongjiu.lu@intel.com> | 2008-02-18 23:44:32 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2008-02-18 15:44:32 -0800 |
| commit | feaffcaaa9c1b005498a51fc4b2af6d3c9d21fe1 (patch) | |
| tree | 5cb219bb7772e80032acadfde74f63a9148f848d | |
| parent | b2ae828d7a91ec75eeb2da0af8e05992afe9209c (diff) | |
| download | gcc-feaffcaaa9c1b005498a51fc4b2af6d3c9d21fe1.zip gcc-feaffcaaa9c1b005498a51fc4b2af6d3c9d21fe1.tar.gz gcc-feaffcaaa9c1b005498a51fc4b2af6d3c9d21fe1.tar.bz2 | |
i386-modes.def: Use 4 byte alignment on DI for 32bit host.
2008-02-18 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386-modes.def: Use 4 byte alignment on DI for
32bit host.
From-SVN: r132397
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/i386/i386-modes.def | 4 |
2 files changed, 9 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3ecc40c..733d076 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2008-02-18 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386-modes.def: Use 4 byte alignment on DI for + 32bit host. + 2008-02-18 Joey Ye <joey.ye@intel.com> PR middle-end/34921 diff --git a/gcc/config/i386/i386-modes.def b/gcc/config/i386/i386-modes.def index 105d387..f2f2b4f 100644 --- a/gcc/config/i386/i386-modes.def +++ b/gcc/config/i386/i386-modes.def @@ -17,6 +17,10 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ +/* In 32bit, DI mode uses 32bit registers. Only 4 byte alignment + is needed. */ +ADJUST_ALIGNMENT (DI, (TARGET_64BIT || TARGET_ALIGN_DOUBLE) ? 8 : 4); + /* The x86_64 ABI specifies both XF and TF modes. XFmode is __float80 is IEEE extended; TFmode is __float128 is IEEE quad. */ |