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| author | Alexandre Oliva <oliva@adacore.com> | 2020-12-31 21:38:22 -0300 |
|---|---|---|
| committer | Alexandre Oliva <oliva@gnu.org> | 2021-01-01 01:38:16 -0300 |
| commit | fe0e54c69fc0c07144ce7e8710c29162053430b3 (patch) | |
| tree | ce4b3e4c12e099b9bb5bd1aa287a6339e3ed3ddd | |
| parent | 53be78f0715b8b34ebdf4fa507f30fcd622de0a7 (diff) | |
| download | gcc-fe0e54c69fc0c07144ce7e8710c29162053430b3.zip gcc-fe0e54c69fc0c07144ce7e8710c29162053430b3.tar.gz gcc-fe0e54c69fc0c07144ce7e8710c29162053430b3.tar.bz2 | |
-mno-long-calls for expected regalloc in arm/fp16-aapcs-2.c test
The implicit -mlong-calls used in our arm-vxworks configurations
changes the register allocation patterns in the arm/fp16-aapcs-2.c
test: r3 ends up used in the long-call sequence, and we end up using
ip as a temporary, which doesn't match the expected mov patterns.
This patch adds an explicit -mno-long-calls for the generated code to
match the expectation.
for gcc/testsuite/ChangeLog
* gcc.target/arm/fp16-aapcs-2.c: Use -mno-long-calls.
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c index 51a76fc..c34387f 100644 --- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c +++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_fp16_ok } */ -/* { dg-options "-mfloat-abi=softfp -O2" } */ +/* { dg-options "-mfloat-abi=softfp -O2 -mno-long-calls" } */ /* { dg-add-options arm_fp16_ieee } */ /* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */ |