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authorJesse Huang <jesse.huang@sifive.com>2025-04-10 21:25:21 -0700
committerKito Cheng <kito.cheng@sifive.com>2025-04-16 14:55:27 +0800
commitfc4099a4842805f1eb59a666e18f84e309df8cb1 (patch)
treee65878142794f39ea87e18961cc04a6985d43b58
parent1d9e02bb7e0af4f3d3eaaa1a0f4961970aba5560 (diff)
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riscv: Fix incorrect gnu property alignment on rv32
Codegen is incorrectly emitting a ".p2align 3" that coerces the alignment of the .note.gnu.property section from 4 to 8 on rv32. 2025-04-11 Jesse Huang <jesse.huang@sifive.com> gcc/ChangeLog * config/riscv/riscv.cc (riscv_file_end): Fix .p2align value. gcc/testsuite/ChangeLog * gcc.target/riscv/gnu-property-align-rv32.c: New file. * gcc.target/riscv/gnu-property-align-rv64.c: New file.
-rw-r--r--gcc/config/riscv/riscv.cc2
-rw-r--r--gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c7
-rw-r--r--gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c7
3 files changed, 15 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 38f3ae7..d3656a7 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -10382,7 +10382,7 @@ riscv_file_end ()
fprintf (asm_out_file, "1:\n");
/* pr_type. */
- fprintf (asm_out_file, "\t.p2align\t3\n");
+ fprintf (asm_out_file, "\t.p2align\t%u\n", p2align);
fprintf (asm_out_file, "2:\n");
fprintf (asm_out_file, "\t.long\t0xc0000000\n");
/* pr_datasz. */
diff --git a/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c b/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c
new file mode 100644
index 0000000..4f48cff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32g_zicfiss -fcf-protection=return -mabi=ilp32d " } */
+
+void foo() {}
+
+/* { dg-final { scan-assembler-times ".p2align\t2" 3 } } */
+/* { dg-final { scan-assembler-not ".p2align\t3" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c b/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c
new file mode 100644
index 0000000..1bfd127
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64g_zicfiss -fcf-protection=return -mabi=lp64d " } */
+
+void foo() {}
+
+/* { dg-final { scan-assembler-times ".p2align\t3" 3 } } */
+/* { dg-final { scan-assembler-not ".p2align\t2" } } */