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| author | Alan Lawrence <alan.lawrence@arm.com> | 2014-08-06 10:17:05 +0000 |
|---|---|---|
| committer | Alan Lawrence <alalaw01@gcc.gnu.org> | 2014-08-06 10:17:05 +0000 |
| commit | f901401e53769c0b0272a91417f161ad314f6c4b (patch) | |
| tree | dc6d1a6bc8d026fe7661a51e2686a038a74061be | |
| parent | 06e105fc9bc2aeba719e670a8b63982cff7dae1a (diff) | |
| download | gcc-f901401e53769c0b0272a91417f161ad314f6c4b.zip gcc-f901401e53769c0b0272a91417f161ad314f6c4b.tar.gz gcc-f901401e53769c0b0272a91417f161ad314f6c4b.tar.bz2 | |
[PATCH AArch64] Prefer dup to zip for vec_perm_const; enable dup for bigendian; add testcase.
gcc/:
* config/aarch64/aarch64.c (aarch64_evpc_dup): Enable for bigendian.
(aarch64_expand_vec_perm_const): Check for dup before zip.
gcc/testsuite:
* gcc.target/aarch64/vdup_n_2.c: New test.
From-SVN: r213659
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/vdup_n_2.c | 28 |
4 files changed, 40 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b099983..3911174 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2014-08-06 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64.c (aarch64_evpc_dup): Enable for bigendian. + (aarch64_expand_vec_perm_const): Check for dup before zip. + 2014-08-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.c (aarch64_classify_address): Use REG_P and diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 5ccd860..1165428 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -9378,10 +9378,6 @@ aarch64_evpc_dup (struct expand_vec_perm_d *d) unsigned int i, elt, nelt = d->nelt; rtx lane; - /* TODO: This may not be big-endian safe. */ - if (BYTES_BIG_ENDIAN) - return false; - elt = d->perm[0]; for (i = 1; i < nelt; i++) { @@ -9395,7 +9391,7 @@ aarch64_evpc_dup (struct expand_vec_perm_d *d) use d->op0 and need not do any extra arithmetic to get the correct lane number. */ in0 = d->op0; - lane = GEN_INT (elt); + lane = GEN_INT (elt); /* The pattern corrects for big-endian. */ switch (vmode) { @@ -9476,14 +9472,14 @@ aarch64_expand_vec_perm_const_1 (struct expand_vec_perm_d *d) return true; else if (aarch64_evpc_ext (d)) return true; + else if (aarch64_evpc_dup (d)) + return true; else if (aarch64_evpc_zip (d)) return true; else if (aarch64_evpc_uzp (d)) return true; else if (aarch64_evpc_trn (d)) return true; - else if (aarch64_evpc_dup (d)) - return true; return aarch64_evpc_tbl (d); } return false; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7f517fa..096c489 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2014-08-06 Alan Lawrence <alan.lawrence@arm.com> + + * gcc.target/aarch64/vdup_n_2.c: New test. + 2014-08-06 Maciej W. Rozycki <macro@codesourcery.com> * gcc.dg/pr44194-1.c: Also exclude powerpc*-*-linux*, except if diff --git a/gcc/testsuite/gcc.target/aarch64/vdup_n_2.c b/gcc/testsuite/gcc.target/aarch64/vdup_n_2.c new file mode 100644 index 0000000..660fb0f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vdup_n_2.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fno-inline --save-temps" } */ + +extern void abort (void); + +typedef float float32x2_t __attribute__ ((__vector_size__ ((8)))); +typedef unsigned int uint32x2_t __attribute__ ((__vector_size__ ((8)))); + +float32x2_t +test_dup_1 (float32x2_t in) +{ + return __builtin_shuffle (in, (uint32x2_t) {1, 1}); +} + +int +main (int argc, char **argv) +{ + float32x2_t test = {2.718, 3.141}; + float32x2_t res = test_dup_1 (test); + if (res[0] != test[1] || res[1] != test[1]) + abort (); + return 0; +} + +/* { dg-final { scan-assembler-times "\[ \t\]*dup\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.s\\\[\[01\]\\\]" 1 } } */ +/* { dg-final { scan-assembler-not "zip" } } */ +/* { dg-final { cleanup-saved-temps } } */ + |