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| author | Christophe Lyon <christophe.lyon@arm.com> | 2023-02-28 15:49:58 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@arm.com> | 2023-05-12 12:40:39 +0200 |
| commit | f7196b72752cc4089570e75ebcce641b6d0165f2 (patch) | |
| tree | 8df93595cb4eb40814206eccca1c92ffb5e16fdb | |
| parent | 179507399a34c8bf46b33ea4edfd3de51962edb2 (diff) | |
| download | gcc-f7196b72752cc4089570e75ebcce641b6d0165f2.zip gcc-f7196b72752cc4089570e75ebcce641b6d0165f2.tar.gz gcc-f7196b72752cc4089570e75ebcce641b6d0165f2.tar.bz2 | |
arm: [MVE intrinsics] factorize vpselq
Factorize vpselq builtins so that they use parameterized names.
2022-12-12 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
gen_mve_vpselq.
* config/arm/iterators.md (MVE_VPSELQ_F): New.
(mve_insn): Add vpsel.
* config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(@mve_vpselq_f<mode>): Rename into ...
(@mve_<mve_insn>q_f<mode>): ... this.
| -rw-r--r-- | gcc/config/arm/arm.cc | 8 | ||||
| -rw-r--r-- | gcc/config/arm/iterators.md | 5 | ||||
| -rw-r--r-- | gcc/config/arm/mve.md | 18 |
3 files changed, 18 insertions, 13 deletions
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 06e0756..da7e9c8 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -31633,13 +31633,13 @@ arm_expand_vcond (rtx *operands, machine_mode cmp_result_mode) switch (GET_MODE_CLASS (cmp_mode)) { case MODE_VECTOR_INT: - emit_insn (gen_mve_vpselq (VPSELQ_S, cmp_mode, operands[0], - operands[1], operands[2], mask)); + emit_insn (gen_mve_q (VPSELQ_S, VPSELQ_S, cmp_mode, operands[0], + operands[1], operands[2], mask)); break; case MODE_VECTOR_FLOAT: if (TARGET_HAVE_MVE_FLOAT) - emit_insn (gen_mve_vpselq_f (cmp_mode, operands[0], - operands[1], operands[2], mask)); + emit_insn (gen_mve_q_f (VPSELQ_F, cmp_mode, operands[0], + operands[1], operands[2], mask)); else gcc_unreachable (); break; diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 022744f..3d4a9cf 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -898,6 +898,10 @@ (VCMPNEQ_M_N_F "ne") ]) +(define_int_iterator MVE_VPSELQ_F [ + VPSELQ_F + ]) + (define_int_attr mve_insn [ (VABAVQ_P_S "vabav") (VABAVQ_P_U "vabav") (VABAVQ_S "vabav") (VABAVQ_U "vabav") @@ -1030,6 +1034,7 @@ (VORRQ_M_N_S "vorr") (VORRQ_M_N_U "vorr") (VORRQ_M_S "vorr") (VORRQ_M_U "vorr") (VORRQ_M_F "vorr") (VORRQ_N_S "vorr") (VORRQ_N_U "vorr") + (VPSELQ_S "vpsel") (VPSELQ_U "vpsel") (VPSELQ_F "vpsel") (VQABSQ_M_S "vqabs") (VQABSQ_S "vqabs") (VQADDQ_M_N_S "vqadd") (VQADDQ_M_N_U "vqadd") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index b877987..c6f9c0b 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -1969,7 +1969,7 @@ ;; ;; [vpselq_u, vpselq_s]) ;; -(define_insn "@mve_vpselq_<supf><mode>" +(define_insn "@mve_<mve_insn>q_<supf><mode>" [ (set (match_operand:MVE_1 0 "s_register_operand" "=w") (unspec:MVE_1 [(match_operand:MVE_1 1 "s_register_operand" "w") @@ -1978,7 +1978,7 @@ VPSELQ)) ] "TARGET_HAVE_MVE" - "vpsel %q0, %q1, %q2" + "<mve_insn>\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2427,16 +2427,16 @@ ;; ;; [vpselq_f]) ;; -(define_insn "@mve_vpselq_f<mode>" +(define_insn "@mve_<mve_insn>q_f<mode>" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w") (match_operand:MVE_0 2 "s_register_operand" "w") (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")] - VPSELQ_F)) + MVE_VPSELQ_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpsel %q0, %q1, %q2" + "<mve_insn>\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -6867,12 +6867,12 @@ switch (GET_MODE_CLASS (<MODE>mode)) { case MODE_VECTOR_INT: - emit_insn (gen_mve_vpselq (VPSELQ_S, <MODE>mode, operands[0], - operands[1], operands[2], operands[3])); + emit_insn (gen_mve_q (VPSELQ_S, VPSELQ_S, <MODE>mode, operands[0], + operands[1], operands[2], operands[3])); break; case MODE_VECTOR_FLOAT: - emit_insn (gen_mve_vpselq_f (<MODE>mode, operands[0], - operands[1], operands[2], operands[3])); + emit_insn (gen_mve_q_f (VPSELQ_F, <MODE>mode, operands[0], + operands[1], operands[2], operands[3])); break; default: gcc_unreachable (); |