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authorH.J. Lu <hongjiu.lu@intel.com>2009-04-07 20:18:34 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2009-04-07 13:18:34 -0700
commitf2a758a2822e0cff6198095b5b5ed4c680f35831 (patch)
tree23db104d1a979b17c69526cecd04bc68328a50e7
parent6ea2bd47dd50fdf50e5b71e7349dae094f2920fe (diff)
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invoke.texi: Document Atom support.
2009-04-07 H.J. Lu <hongjiu.lu@intel.com> * doc/invoke.texi: Document Atom support. From-SVN: r145700
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/doc/invoke.texi3
2 files changed, 7 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6f44891..52cde35 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2009-04-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/invoke.texi: Document Atom support.
+
2009-04-07 Jason Merrill <jason@redhat.com>
PR c++/25185
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b5d795a..28dd0cf 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -10996,6 +10996,9 @@ SSE2 and SSE3 instruction set support.
@item core2
Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
instruction set support.
+@item atom
+Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
+instruction set support.
@item k6
AMD K6 CPU with MMX instruction set support.
@item k6-2, k6-3