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authorRichard Earnshaw <rearnsha@arm.com>2008-12-19 17:22:58 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>2008-12-19 17:22:58 +0000
commitf0b4bdd55db4cf919d9e8c7c14d20b1f465210a2 (patch)
treee47313add1118825f66f94764f9c52001e77764f
parent7bda4a1df46915335ffefe3d6497adc76e6e4598 (diff)
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re PR bootstrap/38578 (fatal warning during bootstrap on arm.c for output_move_double and arm_expand_prologue)
PR bootstrap/38578 * arm.c (load_multiple_sequence): Initialize ORDER array. (store_multiple_sequence): Likewise. (output_move_double): Make reg0 unsigned. (arm_output_epilogue): Make amount unsigned. (arm_expand_prologue): Move declaration of dwarf before block statements. From-SVN: r142837
-rw-r--r--gcc/ChangeLog10
-rw-r--r--gcc/config/arm/arm.c12
2 files changed, 18 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4544e9a..fa2ccd6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2008-12-19 Richard Earnshaw <rearnsha@arm.com>
+
+ PR bootstrap/38578
+ * arm.c (load_multiple_sequence): Initialize ORDER array.
+ (store_multiple_sequence): Likewise.
+ (output_move_double): Make reg0 unsigned.
+ (arm_output_epilogue): Make amount unsigned.
+ (arm_expand_prologue): Move declaration of dwarf before block
+ statements.
+
2008-12-19 Steve Ellcey <sje@cup.hp.com>
* df-scan.c ( df_hard_reg_init): Move declaration of i.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 46aa238..afaade0 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -7001,6 +7001,8 @@ load_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
though could be easily extended if required. */
gcc_assert (nops >= 2 && nops <= 4);
+ memset (order, 0, 4 * sizeof (int));
+
/* Loop over the operands and check that the memory references are
suitable (i.e. immediate offsets from the same base register). At
the same time, extract the target register, and the memory
@@ -7228,6 +7230,8 @@ store_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
extended if required. */
gcc_assert (nops >= 2 && nops <= 4);
+ memset (order, 0, 4 * sizeof (int));
+
/* Loop over the operands and check that the memory references are
suitable (i.e. immediate offsets from the same base register). At
the same time, extract the target register, and the memory
@@ -9986,7 +9990,7 @@ output_move_double (rtx *operands)
if (code0 == REG)
{
- int reg0 = REGNO (operands[0]);
+ unsigned int reg0 = REGNO (operands[0]);
otherops[0] = gen_rtx_REG (SImode, 1 + reg0);
@@ -11661,7 +11665,7 @@ arm_output_epilogue (rtx sibling)
(where frame pointer is required to point at first register)
and ARM-non-apcs-frame. Therefore, such change is postponed
until real need arise. */
- HOST_WIDE_INT amount;
+ unsigned HOST_WIDE_INT amount;
int rfe;
/* Restore stack pointer if necessary. */
if (TARGET_ARM && frame_pointer_needed)
@@ -12653,11 +12657,11 @@ arm_expand_prologue (void)
insn = emit_set_insn (gen_rtx_REG (SImode, 3), ip_rtx);
else if (args_to_push == 0)
{
+ rtx dwarf;
+
gcc_assert(arm_compute_static_chain_stack_bytes() == 4);
saved_regs += 4;
- rtx dwarf;
-
insn = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
insn = emit_set_insn (gen_frame_mem (SImode, insn), ip_rtx);
fp_offset = 4;