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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-11-12 07:54:01 +0000 |
|---|---|---|
| committer | Richard Biener <rguenth@gcc.gnu.org> | 2019-11-12 07:54:01 +0000 |
| commit | f03099371687f3f087e4949a68daccf76c8d18bc (patch) | |
| tree | d9a2f75500e0aa2cf20063db73dcf41307652611 | |
| parent | c9cd5c56fd01ea931308dfb6232a01cd5478bd3d (diff) | |
| download | gcc-f03099371687f3f087e4949a68daccf76c8d18bc.zip gcc-f03099371687f3f087e4949a68daccf76c8d18bc.tar.gz gcc-f03099371687f3f087e4949a68daccf76c8d18bc.tar.bz2 | |
re PR tree-optimization/92347 (ICE in vect_get_vec_def_for_operand_1, at tree-vect-stmts.c:1537)
2019-11-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR tree-optimization/92347
* tree-vect-loop.c (vect_transform_loop): Don't overwrite epilogues
safelen with 0.
* gcc.dg/vect/pr92347.c: New test.
From-SVN: r278079
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/vect/pr92347.c | 18 | ||||
| -rw-r--r-- | gcc/tree-vect-loop.c | 1 |
4 files changed, 27 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a38e54..77ede4d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-11-12 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-loop.c (vect_transform_loop): Don't overwrite epilogues + safelen with 0. + 2019-11-12 Alan Modra <amodra@gmail.com> * config/rs6000/predicates.md (unspec_tls): Allow const0_rtx for got diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 872495b..1ef92af 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2019-11-12 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * gcc.dg/vect/pr92347.c: New test. + 2019-11-11 Jakub Jelinek <jakub@redhat.com> PR c++/92447 diff --git a/gcc/testsuite/gcc.dg/vect/pr92347.c b/gcc/testsuite/gcc.dg/vect/pr92347.c new file mode 100644 index 0000000..f75b259 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr92347.c @@ -0,0 +1,18 @@ +/* Copied from PR 92347. */ +/* { dg-do compile } */ +/* { dg-options "-O1 -fopenmp-simd" } */ +/* { dg-additional-options "-mavx" { target { i?86-*-* x86_64-*-* } } } */ + +int by; + +#pragma omp declare simd +int +zp (int); + +void +qh (int oh) +{ +#pragma omp simd + for (by = 0; by < oh; ++by) + by = zp (by); +} diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c index 78fe629..b600d31 100644 --- a/gcc/tree-vect-loop.c +++ b/gcc/tree-vect-loop.c @@ -8587,7 +8587,6 @@ vect_transform_loop (loop_vec_info loop_vinfo) epilogue->simduid = loop->simduid; epilogue->force_vectorize = loop->force_vectorize; - epilogue->safelen = loop->safelen; epilogue->dont_vectorize = false; } |