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| author | Richard Sandiford <rsandifo@redhat.com> | 2002-07-22 17:25:05 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2002-07-22 17:25:05 +0000 |
| commit | f01f01a6dd30b5683b0dd721ed2b82b194d457ba (patch) | |
| tree | 8ee1f930966db72ef5e685f02c366ddd76e4e4d1 | |
| parent | c2ae8aef4e37a4e43565aafc552d62bb4a485431 (diff) | |
| download | gcc-f01f01a6dd30b5683b0dd721ed2b82b194d457ba.zip gcc-f01f01a6dd30b5683b0dd721ed2b82b194d457ba.tar.gz gcc-f01f01a6dd30b5683b0dd721ed2b82b194d457ba.tar.bz2 | |
mips.h (CLASS_CANNOT_CHANGE_MODE): Include FP_REGS on big-endian targets.
* config/mips/mips.h (CLASS_CANNOT_CHANGE_MODE): Include FP_REGS
on big-endian targets.
From-SVN: r55653
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 8 |
2 files changed, 11 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6432020..9050c80 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2002-07-22 Richard Sandiford <rsandifo@redhat.com> + + * config/mips/mips.h (CLASS_CANNOT_CHANGE_MODE): Include FP_REGS + on big-endian targets. + 2002-07-22 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> * hwint.h (HOST_WIDE_INT_PRINT_DEC_SPACE, diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index f57199c..5f2b74e 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2249,14 +2249,18 @@ extern enum reg_class mips_char_to_class[256]; so (subreg:SI (reg:DI hi) 0) gets the high word instead of the low word as intended. + Similarly, when using paired floating-point registers, the first + register holds the low word, regardless of endianness. So in big + endian mode, (subreg:SI (reg:DF $f0) 0) does not get the high word + as intended. + Also, loading a 32-bit value into a 64-bit floating-point register will not sign-extend the value, despite what LOAD_EXTEND_OP says. We can't allow 64-bit float registers to change from a 32-bit mode to a 64-bit mode. */ #define CLASS_CANNOT_CHANGE_MODE \ - (TARGET_BIG_ENDIAN \ - ? (TARGET_FLOAT64 ? FP_REGS : NO_REGS) \ + (TARGET_BIG_ENDIAN ? FP_REGS \ : (TARGET_FLOAT64 ? HI_AND_FP_REGS : HI_REG)) /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */ |