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| author | Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> | 2011-05-06 10:56:32 +0000 |
|---|---|---|
| committer | Ramana Radhakrishnan <ramana@gcc.gnu.org> | 2011-05-06 10:56:32 +0000 |
| commit | ee6824ae01132c0175ad8db0e58e19ee661fe5cb (patch) | |
| tree | c1dfa8ce7af1d0b08a3e401911908903e58050cb | |
| parent | e7385332a07dc8254dfffcdc4958179a4f9ef121 (diff) | |
| download | gcc-ee6824ae01132c0175ad8db0e58e19ee661fe5cb.zip gcc-ee6824ae01132c0175ad8db0e58e19ee661fe5cb.tar.gz gcc-ee6824ae01132c0175ad8db0e58e19ee661fe5cb.tar.bz2 | |
re PR target/47930 (-marm is undocumented; driver accepts -mno-thumb)
2011-05-06 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
PR target/47930
* config/arm/arm.opt (marm): Document it.
(mthumb): Reject negative variant.
From-SVN: r173481
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.opt | 7 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 16 |
3 files changed, 18 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0d9b62f..9927119 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-05-06 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + PR target/47930 + * config/arm/arm.opt (marm): Document it. + (mthumb): Reject negative variant. + 2011-05-06 Uros Bizjak <ubizjak@gmail.com> PR target/48898 diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 7d2d84c..89c8cbd 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -52,7 +52,8 @@ Target RejectNegative Joined Enum(arm_arch) Var(arm_arch_option) Specify the name of the target architecture marm -Target RejectNegative InverseMask(THUMB) Undocumented +Target Report RejectNegative InverseMask(THUMB) +Generate code in 32 bit ARM state. mbig-endian Target Report RejectNegative Mask(BIG_END) @@ -131,8 +132,8 @@ Target RejectNegative Joined Var(structure_size_string) Specify the minimum bit alignment of structures mthumb -Target Report Mask(THUMB) -Compile for the Thumb not the ARM +Target Report RejectNegative Mask(THUMB) +Generate code for Thumb state mthumb-interwork Target Report Mask(INTERWORK) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 2a46c37..848aa37 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -10282,15 +10282,15 @@ there is a function name embedded immediately preceding this location and has length @code{((pc[-3]) & 0xff000000)}. @item -mthumb +@itemx -marm +@opindex marm @opindex mthumb -Generate code for the Thumb instruction set. The default is to -use the 32-bit ARM instruction set. -This option automatically enables either 16-bit Thumb-1 or -mixed 16/32-bit Thumb-2 instructions based on the @option{-mcpu=@var{name}} -and @option{-march=@var{name}} options. This option is not passed to the -assembler. If you want to force assembler files to be interpreted as Thumb code, -either add a @samp{.thumb} directive to the source or pass the @option{-mthumb} -option directly to the assembler by prefixing it with @option{-Wa}. + +Select between generating code that executes in ARM and Thumb +states. The default for most configurations is to generate code +that executes in ARM state, but the default can be changed by +configuring GCC with the @option{--with-mode=}@var{state} +configure option. @item -mtpcs-frame @opindex mtpcs-frame |