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| author | Richard Earnshaw <rearnsha@arm.com> | 2006-11-16 08:57:50 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2006-11-16 08:57:50 +0000 |
| commit | ecaf6f07808d7d2f5a3929de189d8799e8a085f5 (patch) | |
| tree | 9b7c31f05a2310df35ce1701b32f9907cb69b8ce | |
| parent | 56829cae9cf564f26d4159f6599c045e71c0a41a (diff) | |
| download | gcc-ecaf6f07808d7d2f5a3929de189d8799e8a085f5.zip gcc-ecaf6f07808d7d2f5a3929de189d8799e8a085f5.tar.gz gcc-ecaf6f07808d7d2f5a3929de189d8799e8a085f5.tar.bz2 | |
arm.md (abssi2): Allow Thumb as well.
* arm.md (abssi2): Allow Thumb as well. Use an SImode scratch for
Thumb.
(arm_neg_abssi2): Renamed from neg_abssi2.
(thumb_abssi2, thumb_neg_abssi2): New patterns with splitters.
From-SVN: r118884
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 43 |
2 files changed, 45 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index eb31d9f..c5ae49a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2006-11-16 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (abssi2): Allow Thumb as well. Use an SImode scratch for + Thumb. + (arm_neg_abssi2): Renamed from neg_abssi2. + (thumb_abssi2, thumb_neg_abssi2): New patterns with splitters. + 2006-11-16 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.c (ix86_function_sseregparm): Fix comment: diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index b2e3c7e..83a3cf4 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3066,12 +3066,17 @@ [(parallel [(set (match_operand:SI 0 "s_register_operand" "") (abs:SI (match_operand:SI 1 "s_register_operand" ""))) - (clobber (reg:CC CC_REGNUM))])] - "TARGET_ARM" - "") + (clobber (match_dup 2))])] + "TARGET_EITHER" + " + if (TARGET_THUMB) + operands[2] = gen_rtx_SCRATCH (SImode); + else + operands[2] = gen_rtx_REG (CCmode, CC_REGNUM); +") (define_insn "*arm_abssi2" - [(set (match_operand:SI 0 "s_register_operand" "=r,&r") + [(set (match_operand:SI 0 "s_register_operand" "=r,&r") (abs:SI (match_operand:SI 1 "s_register_operand" "0,r"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" @@ -3084,7 +3089,21 @@ (set_attr "length" "8")] ) -(define_insn "*neg_abssi2" +(define_insn_and_split "*thumb_abssi2" + [(set (match_operand:SI 0 "s_register_operand" "=l") + (abs:SI (match_operand:SI 1 "s_register_operand" "l"))) + (clobber (match_scratch:SI 2 "=&l"))] + "TARGET_THUMB" + "#" + "TARGET_THUMB && reload_completed" + [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31))) + (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2))) + (set (match_dup 0) (xor:SI (match_dup 0) (match_dup 2)))] + "" + [(set_attr "length" "6")] +) + +(define_insn "*arm_neg_abssi2" [(set (match_operand:SI 0 "s_register_operand" "=r,&r") (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "0,r")))) (clobber (reg:CC CC_REGNUM))] @@ -3098,6 +3117,20 @@ (set_attr "length" "8")] ) +(define_insn_and_split "*thumb_neg_abssi2" + [(set (match_operand:SI 0 "s_register_operand" "=l") + (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "l")))) + (clobber (match_scratch:SI 2 "=&l"))] + "TARGET_THUMB" + "#" + "TARGET_THUMB && reload_completed" + [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31))) + (set (match_dup 0) (minus:SI (match_dup 2) (match_dup 1))) + (set (match_dup 0) (xor:SI (match_dup 0) (match_dup 2)))] + "" + [(set_attr "length" "6")] +) + (define_expand "abssf2" [(set (match_operand:SF 0 "s_register_operand" "") (abs:SF (match_operand:SF 1 "s_register_operand" "")))] |