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authorHu, Lin1 <lin1.hu@intel.com>2023-06-27 14:06:20 +0800
committerHu, Lin1 <lin1.hu@intel.com>2023-08-02 10:14:33 +0800
commiteb0a9102a93e4a5ae8f0db707812e140100617d4 (patch)
tree3c04300fab32e16b870ab145db2d7220b0665845
parent75ce64c12b60a9823bf8b930980834c2abb11372 (diff)
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i386: refactor macros.
gcc/ChangeLog: * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET): Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET. (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto (OPTION_MASK_ISA_ABM_SET): Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET. Signed-off-by: Hu, Lin1 <lin1.hu@intel.com>
-rw-r--r--gcc/common/config/i386/i386-common.cc10
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index 3d51694..2600591 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -107,18 +107,18 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA2_AVX512VP2INTERSECT_SET OPTION_MASK_ISA2_AVX512VP2INTERSECT
#define OPTION_MASK_ISA2_AMX_TILE_SET OPTION_MASK_ISA2_AMX_TILE
#define OPTION_MASK_ISA2_AMX_INT8_SET \
- (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_INT8)
+ (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_INT8)
#define OPTION_MASK_ISA2_AMX_BF16_SET \
- (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_BF16)
+ (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_BF16)
#define OPTION_MASK_ISA2_AVXVNNIINT8_SET OPTION_MASK_ISA2_AVXVNNIINT8
#define OPTION_MASK_ISA2_AVXNECONVERT_SET OPTION_MASK_ISA2_AVXNECONVERT
#define OPTION_MASK_ISA2_CMPCCXADD_SET OPTION_MASK_ISA2_CMPCCXADD
#define OPTION_MASK_ISA2_AMX_FP16_SET \
- (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_FP16)
+ (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_FP16)
#define OPTION_MASK_ISA2_PREFETCHI_SET OPTION_MASK_ISA2_PREFETCHI
#define OPTION_MASK_ISA2_RAOINT_SET OPTION_MASK_ISA2_RAOINT
#define OPTION_MASK_ISA2_AMX_COMPLEX_SET \
- (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_COMPLEX)
+ (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_COMPLEX)
#define OPTION_MASK_ISA2_AVXVNNIINT16_SET OPTION_MASK_ISA2_AVXVNNIINT16
#define OPTION_MASK_ISA2_SM3_SET OPTION_MASK_ISA2_SM3
#define OPTION_MASK_ISA2_SHA512_SET OPTION_MASK_ISA2_SHA512
@@ -147,7 +147,7 @@ along with GCC; see the file COPYING3. If not see
(OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET)
#define OPTION_MASK_ISA_ABM_SET \
- (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
+ (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT_SET)
#define OPTION_MASK_ISA2_PCONFIG_SET OPTION_MASK_ISA2_PCONFIG
#define OPTION_MASK_ISA2_WBNOINVD_SET OPTION_MASK_ISA2_WBNOINVD