[AArch64][11/14] Re-layout SIMD builtin types on builtin expansion

	* config/aarch64/aarch64.c (aarch64_option_valid_attribute_p):
	Initialize simd builtins if TARGET_SIMD.
	* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
	Make sure that the builtins are initialized only once no matter how
	many times the function is called.
	(aarch64_init_builtins): Unconditionally initialize crc builtins.
	(aarch64_relayout_simd_param): New function.
	(aarch64_simd_expand_args): Use above during argument expansion.
	* config/aarch64/aarch64-c.c (aarch64_pragma_target_parse): Initialize
	simd builtins if TARGET_SIMD.
	* config/aarch64/aarch64-protos.h (aarch64_init_simd_builtins): New
	prototype.
	(aarch64_relayout_simd_types): Likewise.

	* gcc.target/aarch64/target_attr_crypto_ice_1.c: New test.

From-SVN: r226564

7 files changed, 104 insertions, 3 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5a5ba6e..fb8cbe1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,21 @@
 2015-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
+	* config/aarch64/aarch64.c (aarch64_option_valid_attribute_p):
+	Initialize simd builtins if TARGET_SIMD.
+	* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
+	Make sure that the builtins are initialized only once no matter how
+	many times the function is called.
+	(aarch64_init_builtins): Unconditionally initialize crc builtins.
+	(aarch64_relayout_simd_param): New function.
+	(aarch64_simd_expand_args): Use above during argument expansion.
+	* config/aarch64/aarch64-c.c (aarch64_pragma_target_parse): Initialize
+	simd builtins if TARGET_SIMD.
+	* config/aarch64/aarch64-protos.h (aarch64_init_simd_builtins): New
+	prototype.
+	(aarch64_relayout_simd_types): Likewise.
+
+2015-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
 	* config.gcc (aarch64*-*-*): Specify c_target_objs and cxx_target_objs.
 	* config/aarch64/aarch64.h (REGISTER_TARGET_PRAGMAS): Define.
 	(TARGET_CPU_CPP_BUILTINS): Redefine to call aarch64_cpu_cpp_builtins.
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index 800f6e1..0f4f2b9 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -684,11 +684,18 @@ aarch64_init_simd_builtin_scalar_types (void)
 					     "__builtin_aarch64_simd_udi");
 }
 
-static void
+static bool aarch64_simd_builtins_initialized_p = false;
+
+void
 aarch64_init_simd_builtins (void)
 {
   unsigned int i, fcode = AARCH64_SIMD_PATTERN_START;
 
+  if (aarch64_simd_builtins_initialized_p)
+    return;
+
+  aarch64_simd_builtins_initialized_p = true;
+
   aarch64_init_simd_builtin_types ();
 
   /* Strong-typing hasn't been implemented for all AdvSIMD builtin intrinsics.
@@ -857,8 +864,8 @@ aarch64_init_builtins (void)
 
   if (TARGET_SIMD)
     aarch64_init_simd_builtins ();
-  if (TARGET_CRC32)
-    aarch64_init_crc32_builtins ();
+
+  aarch64_init_crc32_builtins ();
 }
 
 tree
@@ -879,6 +886,31 @@ typedef enum
   SIMD_ARG_STOP
 } builtin_simd_arg;
 
+/* Relayout the decl of a function arg.  Keep the RTL component the same,
+   as varasm.c ICEs.  It doesn't like reinitializing the RTL
+   on PARM decls.  Something like this needs to be done when compiling a
+   file without SIMD and then tagging a function with +simd and using SIMD
+   intrinsics in there.  The types will have been laid out assuming no SIMD,
+   so we want to re-lay them out.  */
+
+static void
+aarch64_relayout_simd_param (tree arg)
+{
+  tree argdecl = arg;
+  if (TREE_CODE (argdecl) == SSA_NAME)
+    argdecl = SSA_NAME_VAR (argdecl);
+
+  if (argdecl
+      && (TREE_CODE (argdecl) == PARM_DECL
+	  || TREE_CODE (argdecl) == VAR_DECL))
+    {
+      rtx rtl = NULL_RTX;
+      rtl = DECL_RTL_IF_SET (argdecl);
+      relayout_decl (argdecl);
+      SET_DECL_RTL (argdecl, rtl);
+    }
+}
+
 static rtx
 aarch64_simd_expand_args (rtx target, int icode, int have_retval,
 			  tree exp, builtin_simd_arg *args,
@@ -908,6 +940,7 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval,
 	{
 	  tree arg = CALL_EXPR_ARG (exp, opc - have_retval);
 	  enum machine_mode mode = insn_data[icode].operand[opc].mode;
+	  aarch64_relayout_simd_param (arg);
 	  op[opc] = expand_normal (arg);
 
 	  switch (thisarg)
diff --git a/gcc/config/aarch64/aarch64-c.c b/gcc/config/aarch64/aarch64-c.c
index 45da70f..303025f 100644
--- a/gcc/config/aarch64/aarch64-c.c
+++ b/gcc/config/aarch64/aarch64-c.c
@@ -177,6 +177,19 @@ aarch64_pragma_target_parse (tree args, tree pop_target)
 
   cpp_opts->warn_unused_macros = saved_warn_unused_macros;
 
+  /* Initialize SIMD builtins if we haven't already.
+     Set current_target_pragma to NULL for the duration so that
+     the builtin initialization code doesn't try to tag the functions
+     being built with the attributes specified by any current pragma, thus
+     going into an infinite recursion.  */
+  if (TARGET_SIMD)
+    {
+      tree saved_current_target_pragma = current_target_pragma;
+      current_target_pragma = NULL;
+      aarch64_init_simd_builtins ();
+      current_target_pragma = saved_current_target_pragma;
+    }
+
   return true;
 }
 
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 260c824..5d8902f 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -323,10 +323,12 @@ void aarch64_expand_vector_init (rtx, rtx);
 void aarch64_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx,
 				   const_tree, unsigned);
 void aarch64_init_expanders (void);
+void aarch64_init_simd_builtins (void);
 void aarch64_print_operand (FILE *, rtx, char);
 void aarch64_print_operand_address (FILE *, rtx);
 void aarch64_emit_call_insn (rtx);
 void aarch64_register_pragmas (void);
+void aarch64_relayout_simd_types (void);
 void aarch64_reset_previous_fndecl (void);
 
 /* Initialize builtins for SIMD intrinsics.  */
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 50934fe..63b49ab 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8450,6 +8450,18 @@ aarch64_option_valid_attribute_p (tree fndecl, tree, tree args, int)
   if (ret)
     {
       aarch64_override_options_internal (&global_options);
+      /* Initialize SIMD builtins if we haven't already.
+	 Set current_target_pragma to NULL for the duration so that
+	 the builtin initialization code doesn't try to tag the functions
+	 being built with the attributes specified by any current pragma, thus
+	 going into an infinite recursion.  */
+      if (TARGET_SIMD)
+	{
+	  tree saved_current_target_pragma = current_target_pragma;
+	  current_target_pragma = NULL;
+	  aarch64_init_simd_builtins ();
+	  current_target_pragma = saved_current_target_pragma;
+	}
       new_target = build_target_option_node (&global_options);
     }
   else
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ff0281b..244ed96 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,9 @@
 2015-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
+	* gcc.target/aarch64/target_attr_crypto_ice_1.c: New test.
+
+2015-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
 	* gcc.target/aarch64/arm_neon-nosimd-error.c: Delete.
 
 2015-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
diff --git a/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c b/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c
new file mode 100644
index 0000000..42f14c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=thunderx+nofp" } */
+
+#include "arm_neon.h"
+
+/* Unless we do something about re-laying out the SIMD builtin types
+   this testcase ICEs during expansion of the crypto builtin.  */
+
+__attribute__ ((target ("cpu=cortex-a57+crypto")))
+uint32x4_t
+test_vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+{
+  return vsha1cq_u32 (hash_abcd, hash_e, wk);
+}
+
+/* This one should be compiled for thunderx with no fp.  */
+int
+foo (int a)
+{
+  return a + 5;
+}