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author | Jakub Jelinek <jakub@redhat.com> | 2011-09-27 09:29:21 +0200 |
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committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2011-09-27 09:29:21 +0200 |
commit | e7c82a992521536902a0b230d9b7508e27cd7839 (patch) | |
tree | 4aa113c1bf28b09947ed8356c4d508a5ad73380f | |
parent | 16fa5e238ac913a6713582d7d93e9289d1ac802a (diff) | |
download | gcc-e7c82a992521536902a0b230d9b7508e27cd7839.zip gcc-e7c82a992521536902a0b230d9b7508e27cd7839.tar.gz gcc-e7c82a992521536902a0b230d9b7508e27cd7839.tar.bz2 |
rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE from 3 x MAX_MACHINE_MODE.
* rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
from 3 x MAX_MACHINE_MODE.
(CONSTM1_RTX): Define.
* emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
from 3 x MAX_MACHINE_MODE.
(gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
CONSTM1_RTX.
(init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
MODE_VECTOR_INT modes.
* simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>:
Optimize if one operand is CONSTM1_RTX.
* config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x
into mask | x.
From-SVN: r179238
-rw-r--r-- | gcc/ChangeLog | 16 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 6 | ||||
-rw-r--r-- | gcc/emit-rtl.c | 17 | ||||
-rw-r--r-- | gcc/rtl.h | 5 | ||||
-rw-r--r-- | gcc/simplify-rtx.c | 10 |
5 files changed, 43 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a3dd883..52c2e9b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2011-09-27 Jakub Jelinek <jakub@redhat.com> + + * rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE + from 3 x MAX_MACHINE_MODE. + (CONSTM1_RTX): Define. + * emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE + from 3 x MAX_MACHINE_MODE. + (gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are + CONSTM1_RTX. + (init_emit_once): Initialize CONSTM1_RTX for MODE_INT and + MODE_VECTOR_INT modes. + * simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>: + Optimize if one operand is CONSTM1_RTX. + * config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x + into mask | x. + 2011-09-26 David S. Miller <davem@davemloft.net> * config/sparc/sparc.md (edge{8,16,32}{,l}): Return Pmode. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 8b39e1d..119dc9b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -18903,6 +18903,12 @@ ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false) x = gen_rtx_AND (mode, x, op_false); emit_insn (gen_rtx_SET (VOIDmode, dest, x)); } + else if (INTEGRAL_MODE_P (mode) && op_true == CONSTM1_RTX (mode)) + { + op_false = force_reg (mode, op_false); + x = gen_rtx_IOR (mode, cmp, op_false); + emit_insn (gen_rtx_SET (VOIDmode, dest, x)); + } else if (TARGET_XOP) { op_true = force_reg (mode, op_true); diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index ee38d3c..dae7669 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -93,9 +93,10 @@ static GTY(()) int label_num = 1; /* We record floating-point CONST_DOUBLEs in each floating-point mode for the values of 0, 1, and 2. For the integer entries and VOIDmode, we - record a copy of const[012]_rtx. */ + record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX + is set only for MODE_INT and MODE_VECTOR_INT modes. */ -rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; +rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE]; rtx const_true_rtx; @@ -5514,6 +5515,8 @@ gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v) return CONST0_RTX (mode); else if (x == CONST1_RTX (inner)) return CONST1_RTX (mode); + else if (x == CONSTM1_RTX (inner)) + return CONSTM1_RTX (mode); } return gen_rtx_raw_CONST_VECTOR (mode, v); @@ -5674,7 +5677,7 @@ init_emit_once (void) dconsthalf = dconst1; SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1); - for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++) + for (i = 0; i < 3; i++) { const REAL_VALUE_TYPE *const r = (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2); @@ -5704,6 +5707,13 @@ init_emit_once (void) const_tiny_rtx[i][(int) mode] = GEN_INT (i); } + const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx; + + for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); + mode != VOIDmode; + mode = GET_MODE_WIDER_MODE (mode)) + const_tiny_rtx[3][(int) mode] = constm1_rtx; + for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT); mode != VOIDmode; mode = GET_MODE_WIDER_MODE (mode)) @@ -5726,6 +5736,7 @@ init_emit_once (void) { const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0); const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1); + const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3); } for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT); @@ -2074,17 +2074,18 @@ extern GTY(()) rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; #define constm1_rtx (const_int_rtx[MAX_SAVED_CONST_INT-1]) extern GTY(()) rtx const_true_rtx; -extern GTY(()) rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; +extern GTY(()) rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE]; /* Returns a constant 0 rtx in mode MODE. Integer modes are treated the same as VOIDmode. */ #define CONST0_RTX(MODE) (const_tiny_rtx[0][(int) (MODE)]) -/* Likewise, for the constants 1 and 2. */ +/* Likewise, for the constants 1 and 2 and -1. */ #define CONST1_RTX(MODE) (const_tiny_rtx[1][(int) (MODE)]) #define CONST2_RTX(MODE) (const_tiny_rtx[2][(int) (MODE)]) +#define CONSTM1_RTX(MODE) (const_tiny_rtx[3][(int) (MODE)]) /* If HARD_FRAME_POINTER_REGNUM is defined, then a special dummy reg is used to represent the frame pointer. This is because the diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index d81e3a6..1301616 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -2431,9 +2431,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, case IOR: if (trueop1 == CONST0_RTX (mode)) return op0; - if (CONST_INT_P (trueop1) - && ((UINTVAL (trueop1) & GET_MODE_MASK (mode)) - == GET_MODE_MASK (mode))) + if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode)) return op1; if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0)) return op0; @@ -2573,9 +2571,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, case XOR: if (trueop1 == CONST0_RTX (mode)) return op0; - if (CONST_INT_P (trueop1) - && ((UINTVAL (trueop1) & GET_MODE_MASK (mode)) - == GET_MODE_MASK (mode))) + if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode)) return simplify_gen_unary (NOT, mode, op0, mode); if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0) @@ -2721,6 +2717,8 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, case AND: if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0)) return trueop1; + if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode)) + return op0; if (HWI_COMPUTABLE_MODE_P (mode)) { HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode); |