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authorRamana Radhakrishnan <ramana.radhakrishnan@arm.com>2013-07-25 12:50:14 +0000
committerRamana Radhakrishnan <ramana@gcc.gnu.org>2013-07-25 12:50:14 +0000
commite6dcfa183238b81d4e69669cb091a09f116db8e7 (patch)
treee4bddce1b55ab971ddd535c9e3b4472b0552b822
parent0b93d3b68572cc36423a864d26eb74321eb2c4af (diff)
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Remove unnecessary space.
From-SVN: r201241
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/arm/arm.md2
2 files changed, 7 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 87f1deb..6f0c1bc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,12 +1,17 @@
2013-07-25 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+ * config/arm/arm.md (*sibcall_insn): Remove unnecessary space.
+
+2013-07-25 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
PR target/19599
PR target/57731
PR target/57748
- * config/arm/arm.md ("*sibcall_value_insn): Replace use of
+ * config/arm/arm.md ("*sibcall_insn): Replace use of
Ss with US. Adjust output for v5 and v4t.
(*sibcall_value_insn): Likewise and loosen predicate on
operand0.
+
* config/arm/constraints.md ("Ss"): Rename to US.
2013-07-25 Terry Guo <terry.guo@arm.com>
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 1850374..1e85288 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -9630,7 +9630,7 @@
else
{
if (arm_arch5 || arm_arch4t)
- return \" bx%?\\t%0\\t%@ indirect register sibling call\";
+ return \"bx%?\\t%0\\t%@ indirect register sibling call\";
else
return \"mov%?\\t%|pc, %0\\t%@ indirect register sibling call\";
}