aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAndrew Pinski <apinski@marvell.com>2023-06-04 19:21:05 -0700
committerAndrew Pinski <apinski@marvell.com>2023-06-06 19:57:18 -0700
commite60593f3881c72a96a3fa4844d73e8a2cd14f670 (patch)
tree1d9dac2ee7b1bbe757d1e346bec3a7479d5ffeba
parentcc155ff9c38848a8e6a7125dd0b66ac0aef47880 (diff)
downloadgcc-e60593f3881c72a96a3fa4844d73e8a2cd14f670.zip
gcc-e60593f3881c72a96a3fa4844d73e8a2cd14f670.tar.gz
gcc-e60593f3881c72a96a3fa4844d73e8a2cd14f670.tar.bz2
Improve do_store_flag for single bit when there is no non-zero bits
In r14-1534-g908e5ab5c11c, I forgot you could turn off CCP or turn off the bit tracking part of CCP so we would lose out what TER was able to do before hand. This moves around the TER code so that it is used instead of just the nonzerobits. It also makes it easier to remove the TER part of the code later on too. OK? Bootstrapped and tested on x86_64-linux-gnu. Note it reintroduces PR 110117 (which was accidently fixed after r14-1534-g908e5ab5c11c). The next patch in series will fix that. gcc/ChangeLog: * expr.cc (do_store_flag): Rearrange the TER code so that it overrides the nonzero bits info if we had `a & POW2`.
-rw-r--r--gcc/expr.cc28
1 files changed, 11 insertions, 17 deletions
diff --git a/gcc/expr.cc b/gcc/expr.cc
index 4efb991..1c5874b 100644
--- a/gcc/expr.cc
+++ b/gcc/expr.cc
@@ -13158,38 +13158,32 @@ do_store_flag (sepops ops, rtx target, machine_mode mode)
&& (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
{
wide_int nz = tree_nonzero_bits (arg0);
+ gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
+ /* If the defining statement was (x & POW2), then use that instead of
+ the non-zero bits. */
+ if (srcstmt && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
+ {
+ nz = wi::to_wide (gimple_assign_rhs2 (srcstmt));
+ arg0 = gimple_assign_rhs1 (srcstmt);
+ }
if (wi::popcount (nz) == 1
&& (integer_zerop (arg1)
|| wi::to_wide (arg1) == nz))
{
- tree op0;
- int bitnum;
- gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
- /* If the defining statement was (x & POW2), then remove the and
- as we are going to add it back. */
- if (srcstmt
- && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
- {
- op0 = gimple_assign_rhs1 (srcstmt);
- bitnum = tree_log2 (gimple_assign_rhs2 (srcstmt));
- }
- else
- {
- op0 = arg0;
- bitnum = wi::exact_log2 (nz);
- }
+ int bitnum = wi::exact_log2 (nz);
enum tree_code tcode = EQ_EXPR;
if ((code == NE) ^ !integer_zerop (arg1))
tcode = NE_EXPR;
type = lang_hooks.types.type_for_mode (mode, unsignedp);
return expand_single_bit_test (loc, tcode,
- op0,
+ arg0,
bitnum, type, target, mode);
}
}
+
if (! get_subtarget (target)
|| GET_MODE (subtarget) != operand_mode)
subtarget = 0;