diff options
author | Vladimir Makarov <vmakarov@redhat.com> | 2011-04-04 20:19:45 +0000 |
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committer | Vladimir Makarov <vmakarov@gcc.gnu.org> | 2011-04-04 20:19:45 +0000 |
commit | e5b0e1cab42d2b6e364e856dcdade434b8241c17 (patch) | |
tree | d2e5f25caa57b1f1ca4267f71b4e8b1c72221732 | |
parent | a3935ffcb75885f82b3034c8b45bc54b14b49cff (diff) | |
download | gcc-e5b0e1cab42d2b6e364e856dcdade434b8241c17.zip gcc-e5b0e1cab42d2b6e364e856dcdade434b8241c17.tar.gz gcc-e5b0e1cab42d2b6e364e856dcdade434b8241c17.tar.bz2 |
re PR target/48380 (ICE in postreload.c while building trunk)
2011-04-01 Vladimir Makarov <vmakarov@redhat.com>
PR target/48380
* ira.c (ira): Call grow_reg_equivs when fix_reg_equiv_init is
not called.
* ira-emit.c (emit_move_list): Update reg equiv init insn list.
From-SVN: r171951
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/ira-emit.c | 36 | ||||
-rw-r--r-- | gcc/ira.c | 9 |
3 files changed, 41 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fce10f9..659ea83 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2011-04-01 Vladimir Makarov <vmakarov@redhat.com> + + PR target/48380 + * ira.c (ira): Call grow_reg_equivs when fix_reg_equiv_init is + not called. + + * ira-emit.c (emit_move_list): Update reg equiv init insn list. + 2011-04-04 Steven Bosscher <steven@gcc.gnu.org> * cprop.c (struct expr): Split 'expr' field in 'dest' and 'src'. diff --git a/gcc/ira-emit.c b/gcc/ira-emit.c index 4b5068e..0219342 100644 --- a/gcc/ira-emit.c +++ b/gcc/ira-emit.c @@ -900,8 +900,8 @@ modify_move_list (move_t list) static rtx emit_move_list (move_t list, int freq) { - int cost; - rtx result, insn; + int cost, regno; + rtx result, insn, set, to; enum machine_mode mode; enum reg_class aclass; @@ -913,12 +913,34 @@ emit_move_list (move_t list, int freq) allocno_emit_reg (list->from)); list->insn = get_insns (); end_sequence (); - /* The reload needs to have set up insn codes. If the reload - sets up insn codes by itself, it may fail because insns will - have hard registers instead of pseudos and there may be no - machine insn with given hard registers. */ for (insn = list->insn; insn != NULL_RTX; insn = NEXT_INSN (insn)) - recog_memoized (insn); + { + /* The reload needs to have set up insn codes. If the + reload sets up insn codes by itself, it may fail because + insns will have hard registers instead of pseudos and + there may be no machine insn with given hard + registers. */ + recog_memoized (insn); + /* Add insn to equiv init insn list if it is necessary. + Otherwise reload will not remove this insn if it decides + to use the equivalence. */ + if ((set = single_set (insn)) != NULL_RTX) + { + to = SET_DEST (set); + if (GET_CODE (to) == SUBREG) + to = SUBREG_REG (to); + ira_assert (REG_P (to)); + regno = REGNO (to); + if (regno >= ira_reg_equiv_len + || (! ira_reg_equiv_invariant_p[regno] + && ira_reg_equiv_const[regno] == NULL_RTX)) + continue; /* regno has no equivalence. */ + ira_assert ((int) VEC_length (reg_equivs_t, reg_equivs) + >= ira_reg_equiv_len); + reg_equiv_init (regno) + = gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv_init (regno)); + } + } emit_insn (list->insn); mode = ALLOCNO_MODE (list->to); aclass = ALLOCNO_CLASS (list->to); @@ -3657,8 +3657,6 @@ ira (FILE *f) if (delete_trivially_dead_insns (get_insns (), max_reg_num ())) df_analyze (); - grow_reg_equivs (); - if (max_regno != max_regno_before_ira) { regstat_free_n_sets_and_refs (); @@ -3667,10 +3665,10 @@ ira (FILE *f) regstat_compute_ri (); } - allocate_initial_values (reg_equivs); - overall_cost_before = ira_overall_cost; - if (ira_conflicts_p) + if (! ira_conflicts_p) + grow_reg_equivs (); + else { fix_reg_equiv_init (); @@ -3686,6 +3684,7 @@ ira (FILE *f) memset (ira_spilled_reg_stack_slots, 0, max_regno * sizeof (struct ira_spilled_reg_stack_slot)); } + allocate_initial_values (reg_equivs); timevar_pop (TV_IRA); |