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| author | Kaushik Phatak <kaushik.phatak@kpitcummins.com> | 2013-05-31 04:23:02 +0000 |
|---|---|---|
| committer | Kaushik Phatak <kaushikp@gcc.gnu.org> | 2013-05-31 04:23:02 +0000 |
| commit | e571fa591212572f2839eb64ad879aed81846f45 (patch) | |
| tree | add109e0e4b29f46acc1f7c79ed236bab348a345 | |
| parent | a75a6c8625af72d9be1444f81d25619f2d7ace57 (diff) | |
| download | gcc-e571fa591212572f2839eb64ad879aed81846f45.zip gcc-e571fa591212572f2839eb64ad879aed81846f45.tar.gz gcc-e571fa591212572f2839eb64ad879aed81846f45.tar.bz2 | |
rl78.md (mulqi3,mulhi3): New define_expands.
* config/rl78/rl78.md (mulqi3,mulhi3): New define_expands.
(mulqi3_rl78,mulhi3_rl78,mulhi3_g13): New define_insns.
From-SVN: r199469
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/rl78/rl78.md | 67 |
2 files changed, 72 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9086576..42ed626 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-05-31 Kaushik Phatak <kaushik.phatak@kpitcummins.com> + + * config/rl78/rl78.md (mulqi3,mulhi3): New define_expands. + (*mulqi3_rl78,*mulhi3_rl78,*mulhi3_g13): New define_insns. + 2013-05-30 Tobias Burnus <burnus@net-b.de> Thomas Koenig <tkoenig@gcc.gnu.org> diff --git a/gcc/config/rl78/rl78.md b/gcc/config/rl78/rl78.md index b3cfe6d..1bcfc84 100644 --- a/gcc/config/rl78/rl78.md +++ b/gcc/config/rl78/rl78.md @@ -235,6 +235,24 @@ [(set_attr "valloc" "macax")] ) +(define_expand "mulqi3" + [(set (match_operand:QI 0 "register_operand" "") + (mult:QI (match_operand:QI 1 "general_operand" "") + (match_operand:QI 2 "nonmemory_operand" ""))) + ] + "" ; mulu supported by all targets + "" +) + +(define_expand "mulhi3" + [(set (match_operand:HI 0 "register_operand" "") + (mult:HI (match_operand:HI 1 "general_operand" "") + (match_operand:HI 2 "nonmemory_operand" ""))) + ] + "! RL78_MUL_NONE" + "" +) + (define_expand "mulsi3" [(set (match_operand:SI 0 "register_operand" "=&v") (mult:SI (match_operand:SI 1 "nonmemory_operand" "vi") @@ -244,6 +262,55 @@ "" ) +(define_insn "*mulqi3_rl78" + [(set (match_operand:QI 0 "register_operand" "=&v") + (mult:QI (match_operand:QI 1 "general_operand" "+viU") + (match_operand:QI 2 "general_operand" "vi"))) + ] + "" ; mulu supported by all targets + "; mulqi macro %0 = %1 * %2 + mov a, %h1 + mov x, a + mov a, %h2 + mulu x ; ax = a * x + mov a, x + mov %h0, a + ; end of mulqi macro" +) + +(define_insn "*mulhi3_rl78" + [(set (match_operand:HI 0 "register_operand" "=&v") + (mult:HI (match_operand:HI 1 "general_operand" "+viU") + (match_operand:HI 2 "general_operand" "vi"))) + ] + "RL78_MUL_RL78" + "; mulhi macro %0 = %1 * %2 + movw ax, %h1 + movw bc, %h2 + mulhu ; bcax = bc * ax + movw %h0, ax + ; end of mulhi macro" +) + +(define_insn "*mulhi3_g13" + [(set (match_operand:HI 0 "register_operand" "=&v") + (mult:HI (match_operand:HI 1 "general_operand" "+viU") + (match_operand:HI 2 "general_operand" "vi"))) + ] + "RL78_MUL_G13" + "; mulhi macro %0 = %1 * %2 + mov a, #0x00 + mov !0xf00e8, a ; MDUC + movw ax, %h1 + movw 0xffff0, ax ; MDAL + movw ax, %h2 + movw 0xffff2, ax ; MDAH + nop ; mdb = mdal * mdah + movw ax, 0xffff6 ; MDBL + movw %h0, ax + ; end of mulhi macro" +) + ;; 0xFFFF0 is MACR(L). 0xFFFF2 is MACR(H) but we don't care about it ;; because we're only using the lower 16 bits (which is the upper 16 ;; bits of the result). |