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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2011-02-15 18:42:59 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2011-02-15 18:42:59 +0000 |
| commit | e3a69bb44f336a3f388cb9cd51dd7f966accf453 (patch) | |
| tree | ceeafe510f70d4facde86866e9c2cd0127751862 | |
| parent | de650422167b7a651474426acb164bd52f2e53d7 (diff) | |
| download | gcc-e3a69bb44f336a3f388cb9cd51dd7f966accf453.zip gcc-e3a69bb44f336a3f388cb9cd51dd7f966accf453.tar.gz gcc-e3a69bb44f336a3f388cb9cd51dd7f966accf453.tar.bz2 | |
Fix PR 47755
From-SVN: r170189
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/predicates.md | 8 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr47755.c | 16 |
4 files changed, 31 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a4c0ffc..599b09c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-02-15 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/47755 + * config/rs6000/predicates.md (easy_vector_constant): Allow V2DI + mode for vector constants. Remove code that checks for TImode. + 2011-02-15 Alexandre Oliva <aoliva@redhat.com> PR debug/47106 diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index db630f5..1d06cae 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -328,13 +328,11 @@ if (TARGET_PAIRED_FLOAT) return false; - if ((VSX_VECTOR_MODE (mode) || mode == TImode) && zero_constant (op, mode)) - return true; - - if (ALTIVEC_VECTOR_MODE (mode)) + if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)) { if (zero_constant (op, mode)) - return true; + return true; + return easy_altivec_constant (op, mode); } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f9cb378..64bd46a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2011-02-15 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/47755 + * gcc.target/powerpc/pr47755.c: New file, test all 0 vector + constant does not generate a load from memory. + 2011-02-15 H.J. Lu <hongjiu.lu@intel.com> PR middle-end/47725 diff --git a/gcc/testsuite/gcc.target/powerpc/pr47755.c b/gcc/testsuite/gcc.target/powerpc/pr47755.c new file mode 100644 index 0000000..6dbd1fe --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr47755.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O3 -mcpu=power7" } */ +/* { dg-final { scan-assembler "xxlxor" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "lxvw4x" } } */ +/* { dg-final { scan-assembler-not "lvx" } } */ + +/* PR 47755: Compiler loads vector constant of 0 from TOC instead of using + xxlxor. */ +void +func (vector long long *p) +{ + *p = (vector long long) { 0LL, 0LL }; +} |